Verified Commit 66fa77ba authored by 4lDO2's avatar 4lDO2 🖖

Almost compiles.

parent 67e24f35
......@@ -2,7 +2,7 @@
#[inline(always)]
#[cold]
pub unsafe fn fast_copy(dst: *mut u8, src: *const u8, len: usize) {
asm!("cld
llvm_asm!("cld
rep movsb"
:
: "{rdi}"(dst as usize), "{rsi}"(src as usize), "{rcx}"(len)
......@@ -14,7 +14,7 @@ pub unsafe fn fast_copy(dst: *mut u8, src: *const u8, len: usize) {
#[inline(always)]
#[cold]
pub unsafe fn fast_set32(dst: *mut u32, src: u32, len: usize) {
asm!("cld
llvm_asm!("cld
rep stosd"
:
: "{rdi}"(dst as usize), "{eax}"(src), "{rcx}"(len)
......@@ -26,7 +26,7 @@ pub unsafe fn fast_set32(dst: *mut u32, src: u32, len: usize) {
#[inline(always)]
#[cold]
pub unsafe fn fast_set64(dst: *mut u64, src: u64, len: usize) {
asm!("cld
llvm_asm!("cld
rep stosq"
:
: "{rdi}"(dst as usize), "{rax}"(src), "{rcx}"(len)
......
......@@ -137,7 +137,7 @@ interrupt_error!(protection, stack, {
interrupt_error!(page, stack, {
let cr2: usize;
asm!("mov rax, cr2" : "={rax}"(cr2) : : : "intel", "volatile");
llvm_asm!("mov rax, cr2" : "={rax}"(cr2) : : : "intel", "volatile");
println!("Page fault: {:>016X}", cr2);
stack.dump();
stack_trace();
......
......@@ -23,7 +23,7 @@ unsafe fn ps2_interrupt(_index: usize) {
let data: u8;
let status: u8;
asm!("
llvm_asm!("
sti
nop
cli
......
......@@ -14,13 +14,13 @@ pub use super::device::local_apic::bsp_apic_id;
/// Clear interrupts
#[inline(always)]
pub unsafe fn disable() {
asm!("cli" : : : : "intel", "volatile");
llvm_asm!("cli" : : : : "intel", "volatile");
}
/// Set interrupts
#[inline(always)]
pub unsafe fn enable() {
asm!("sti" : : : : "intel", "volatile");
llvm_asm!("sti" : : : : "intel", "volatile");
}
/// Set interrupts and halt
......@@ -28,7 +28,7 @@ pub unsafe fn enable() {
/// Performing enable followed by halt is not guaranteed to be atomic, use this instead!
#[inline(always)]
pub unsafe fn enable_and_halt() {
asm!("sti
llvm_asm!("sti
hlt"
: : : : "intel", "volatile");
}
......@@ -38,7 +38,7 @@ pub unsafe fn enable_and_halt() {
/// Simply enabling interrupts does not gurantee that they will trigger, use this instead!
#[inline(always)]
pub unsafe fn enable_and_nop() {
asm!("sti
llvm_asm!("sti
nop"
: : : : "intel", "volatile");
}
......@@ -46,12 +46,12 @@ pub unsafe fn enable_and_nop() {
/// Halt instruction
#[inline(always)]
pub unsafe fn halt() {
asm!("hlt" : : : : "intel", "volatile");
llvm_asm!("hlt" : : : : "intel", "volatile");
}
/// Pause instruction
/// Safe because it is similar to a NOP, and has no memory effects
#[inline(always)]
pub fn pause() {
unsafe { asm!("pause" : : : : "intel", "volatile"); }
unsafe { llvm_asm!("pause" : : : : "intel", "volatile"); }
}
......@@ -41,7 +41,7 @@ pub unsafe extern fn syscall_instruction() {
with_interrupt_stack! {
unsafe fn inner(stack) -> usize {
let rbp;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
let scratch = &stack.scratch;
syscall::syscall(scratch.rax, scratch.rdi, scratch.rsi, scratch.rdx, scratch.r10, scratch.r8, rbp, stack)
......@@ -49,7 +49,7 @@ pub unsafe extern fn syscall_instruction() {
}
// Yes, this is magic. No, you don't need to understand
asm!("
llvm_asm!("
swapgs // Set gs segment to TSS
mov gs:[28], rsp // Save userspace rsp
mov rsp, gs:[4] // Load kernel rsp
......@@ -71,7 +71,7 @@ pub unsafe extern fn syscall_instruction() {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Map kernel
pti::map();
......@@ -91,7 +91,7 @@ pub unsafe extern fn syscall() {
with_interrupt_stack! {
unsafe fn inner(stack) -> usize {
let rbp;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
let scratch = &stack.scratch;
syscall::syscall(scratch.rax, stack.preserved.rbx, scratch.rcx, scratch.rdx, scratch.rsi, scratch.rdi, rbp, stack)
......@@ -103,7 +103,7 @@ pub unsafe extern fn syscall() {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Map kernel
pti::map();
......@@ -130,5 +130,5 @@ pub unsafe extern "C" fn clone_ret() {
// interrupt->inner->clone_ret->clone
// so this will return from "inner".
asm!("pop rbp" : : : : "intel", "volatile");
llvm_asm!("pop rbp" : : : : "intel", "volatile");
}
......@@ -9,7 +9,7 @@ use crate::paging::{ActivePageTable, VirtualAddress};
#[inline(never)]
pub unsafe fn stack_trace() {
let mut rbp: usize;
asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
llvm_asm!("" : "={rbp}"(rbp) : : : "intel", "volatile");
println!("TRACE: {:>016X}", rbp);
//Maximum 64 frames
......
......@@ -49,7 +49,7 @@ impl ScratchRegisters {
}
macro_rules! scratch_push {
() => (asm!(
() => (llvm_asm!(
"push rax
push rcx
push rdx
......@@ -64,7 +64,7 @@ macro_rules! scratch_push {
}
macro_rules! scratch_pop {
() => (asm!(
() => (llvm_asm!(
"pop r11
pop r10
pop r9
......@@ -102,7 +102,7 @@ impl PreservedRegisters {
}
macro_rules! preserved_push {
() => (asm!(
() => (llvm_asm!(
"push rbx
push rbp
push r12
......@@ -114,7 +114,7 @@ macro_rules! preserved_push {
}
macro_rules! preserved_pop {
() => (asm!(
() => (llvm_asm!(
"pop r15
pop r14
pop r13
......@@ -126,7 +126,7 @@ macro_rules! preserved_pop {
}
macro_rules! fs_push {
() => (asm!(
() => (llvm_asm!(
"
push fs
......@@ -139,7 +139,7 @@ macro_rules! fs_push {
}
macro_rules! fs_pop {
() => (asm!(
() => (llvm_asm!(
"pop fs"
: : : : "intel", "volatile"
));
......@@ -167,7 +167,7 @@ impl IretRegisters {
}
macro_rules! iret {
() => (asm!(
() => (llvm_asm!(
"iretq"
: : : : "intel", "volatile"
));
......@@ -270,7 +270,7 @@ impl InterruptStack {
let cs: usize;
unsafe {
asm!("mov $0, cs" : "=r"(cs) ::: "intel");
llvm_asm!("mov $0, cs" : "=r"(cs) ::: "intel");
}
if self.iret.cs & CPL_MASK == cs & CPL_MASK {
......@@ -279,7 +279,7 @@ impl InterruptStack {
+ mem::size_of::<Self>() // disregard Self
- mem::size_of::<usize>() * 2; // well, almost: rsp and ss need to be excluded as they aren't present
unsafe {
asm!("mov $0, ss" : "=r"(all.ss) ::: "intel");
llvm_asm!("mov $0, ss" : "=r"(all.ss) ::: "intel");
}
} else {
all.rsp = self.iret.rsp;
......@@ -355,7 +355,7 @@ macro_rules! interrupt_stack {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Map kernel
$crate::arch::x86_64::pti::map();
......@@ -409,7 +409,7 @@ macro_rules! interrupt_error {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Map kernel
$crate::arch::x86_64::pti::map();
......@@ -422,7 +422,7 @@ macro_rules! interrupt_error {
// Pop scratch registers, error code, and return
interrupt_pop!();
asm!("add rsp, 8" : : : : "intel", "volatile"); // pop error code
llvm_asm!("add rsp, 8" : : : : "intel", "volatile"); // pop error code
iret!();
}
};
......
......@@ -20,7 +20,7 @@ pub static mut PTI_CONTEXT_STACK: usize = 0;
#[inline(always)]
unsafe fn switch_stack(old: usize, new: usize) {
let old_rsp: usize;
asm!("" : "={rsp}"(old_rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(old_rsp) : : : "intel", "volatile");
let offset_rsp = old - old_rsp;
......@@ -32,7 +32,7 @@ unsafe fn switch_stack(old: usize, new: usize) {
offset_rsp
);
asm!("" : : "{rsp}"(new_rsp) : : "intel", "volatile");
llvm_asm!("" : : "{rsp}"(new_rsp) : : "intel", "volatile");
}
#[cfg(feature = "pti")]
......
......@@ -235,7 +235,7 @@ pub unsafe extern fn kstart_ap(args_ptr: *const KernelArgsAp) -> ! {
#[naked]
pub unsafe fn usermode(ip: usize, sp: usize, arg: usize) -> ! {
asm!("push r10
llvm_asm!("push r10
push r11
push r12
push r13
......@@ -255,7 +255,7 @@ pub unsafe fn usermode(ip: usize, sp: usize, arg: usize) -> ! {
pti::unmap();
// Go to usermode
asm!("mov ds, r14d
llvm_asm!("mov ds, r14d
mov es, r14d
mov fs, r15d
mov gs, r14d
......@@ -289,14 +289,14 @@ pub unsafe fn usermode(ip: usize, sp: usize, arg: usize) -> ! {
pub unsafe fn usermode_interrupt_stack(stack: InterruptStack) -> ! {
// Push fake stack to the actual stack
let rsp: usize;
asm!("sub rsp, $1" : "={rsp}"(rsp) : "r"(mem::size_of::<InterruptStack>()) : : "intel", "volatile");
llvm_asm!("sub rsp, $1" : "={rsp}"(rsp) : "r"(mem::size_of::<InterruptStack>()) : : "intel", "volatile");
ptr::write(rsp as *mut InterruptStack, stack);
// Unmap kernel
pti::unmap();
// Set up floating point and TLS
asm!("mov ds, r14d
llvm_asm!("mov ds, r14d
mov es, r14d
mov fs, r15d
mov gs, r14d
......
......@@ -15,9 +15,9 @@ pub unsafe extern fn kreset() -> ! {
}
// Use triple fault to guarantee reset
asm!("cli" : : : : "intel", "volatile");
asm!("lidt cs:0" : : : : "intel", "volatile");
asm!("int $$3" : : : : "intel", "volatile");
llvm_asm!("cli" : : : : "intel", "volatile");
llvm_asm!("lidt cs:0" : : : : "intel", "volatile");
llvm_asm!("int $$3" : : : : "intel", "volatile");
unreachable!();
}
......@@ -47,6 +47,6 @@ pub unsafe extern fn kstop() -> ! {
// Magic code for VMWare. Also a hard lock.
println!("Shutdown with cli hlt");
loop {
asm!("cli; hlt" : : : : "intel", "volatile");
llvm_asm!("cli; hlt" : : : : "intel", "volatile");
}
}
......@@ -132,42 +132,42 @@ impl Context {
#[inline(never)]
#[naked]
pub unsafe fn switch_to(&mut self, next: &mut Context) {
asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
llvm_asm!("fxsave64 [$0]" : : "r"(self.fx) : "memory" : "intel", "volatile");
self.loadable = true;
if next.loadable {
asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
llvm_asm!("fxrstor64 [$0]" : : "r"(next.fx) : "memory" : "intel", "volatile");
}else{
asm!("fninit" : : : "memory" : "intel", "volatile");
llvm_asm!("fninit" : : : "memory" : "intel", "volatile");
}
asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
llvm_asm!("mov $0, cr3" : "=r"(self.cr3) : : "memory" : "intel", "volatile");
if next.cr3 != self.cr3 {
asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
llvm_asm!("mov cr3, $0" : : "r"(next.cr3) : "memory" : "intel", "volatile");
}
asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
llvm_asm!("pushfq ; pop $0" : "=r"(self.rflags) : : "memory" : "intel", "volatile");
llvm_asm!("push $0 ; popfq" : : "r"(next.rflags) : "memory" : "intel", "volatile");
asm!("mov $0, rbx" : "=r"(self.rbx) : : "memory" : "intel", "volatile");
asm!("mov rbx, $0" : : "r"(next.rbx) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rbx" : "=r"(self.rbx) : : "memory" : "intel", "volatile");
llvm_asm!("mov rbx, $0" : : "r"(next.rbx) : "memory" : "intel", "volatile");
asm!("mov $0, r12" : "=r"(self.r12) : : "memory" : "intel", "volatile");
asm!("mov r12, $0" : : "r"(next.r12) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r12" : "=r"(self.r12) : : "memory" : "intel", "volatile");
llvm_asm!("mov r12, $0" : : "r"(next.r12) : "memory" : "intel", "volatile");
asm!("mov $0, r13" : "=r"(self.r13) : : "memory" : "intel", "volatile");
asm!("mov r13, $0" : : "r"(next.r13) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r13" : "=r"(self.r13) : : "memory" : "intel", "volatile");
llvm_asm!("mov r13, $0" : : "r"(next.r13) : "memory" : "intel", "volatile");
asm!("mov $0, r14" : "=r"(self.r14) : : "memory" : "intel", "volatile");
asm!("mov r14, $0" : : "r"(next.r14) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r14" : "=r"(self.r14) : : "memory" : "intel", "volatile");
llvm_asm!("mov r14, $0" : : "r"(next.r14) : "memory" : "intel", "volatile");
asm!("mov $0, r15" : "=r"(self.r15) : : "memory" : "intel", "volatile");
asm!("mov r15, $0" : : "r"(next.r15) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, r15" : "=r"(self.r15) : : "memory" : "intel", "volatile");
llvm_asm!("mov r15, $0" : : "r"(next.r15) : "memory" : "intel", "volatile");
asm!("mov $0, rsp" : "=r"(self.rsp) : : "memory" : "intel", "volatile");
asm!("mov rsp, $0" : : "r"(next.rsp) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rsp" : "=r"(self.rsp) : : "memory" : "intel", "volatile");
llvm_asm!("mov rsp, $0" : : "r"(next.rsp) : "memory" : "intel", "volatile");
asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
llvm_asm!("mov $0, rbp" : "=r"(self.rbp) : : "memory" : "intel", "volatile");
llvm_asm!("mov rbp, $0" : : "r"(next.rbp) : "memory" : "intel", "volatile");
// Unset global lock after loading registers but before switch
CONTEXT_SWITCH_LOCK.store(false, Ordering::SeqCst);
......@@ -199,7 +199,7 @@ unsafe extern fn signal_handler_wrapper() {
}
// Push scratch registers
asm!("push rax
llvm_asm!("push rax
push rcx
push rdx
push rdi
......@@ -212,13 +212,13 @@ unsafe extern fn signal_handler_wrapper() {
// Get reference to stack variables
let rsp: usize;
asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
llvm_asm!("" : "={rsp}"(rsp) : : : "intel", "volatile");
// Call inner rust function
inner(&*(rsp as *const SignalHandlerStack));
// Pop scratch registers, error code, and return
asm!("pop r11
llvm_asm!("pop r11
pop r10
pop r9
pop r8
......
......@@ -4,8 +4,8 @@ use alloc::vec::Vec;
use alloc::collections::VecDeque;
use core::alloc::{GlobalAlloc, Layout};
use core::cmp::Ordering;
use core::mem;
use spin::{Mutex, Once};
use core::{mem, slice};
use spin::{Mutex, Once, RwLock};
use crate::arch::{macros::InterruptStack, paging::PAGE_SIZE};
use crate::common::unique::Unique;
......@@ -18,6 +18,7 @@ use crate::sync::WaitMap;
use crate::syscall::data::SigAction;
use crate::syscall::flag::{SIG_DFL, SigActionFlags};
use crate::syscall::io_uring::{IoUringCreateFlags, IoUringCreateInfo, IoUringVersion, IoUringRecvInfo};
use crate::syscall::scheme::Scheme;
/// Unique identifier for a context (i.e. `pid`).
use ::core::sync::atomic::AtomicUsize;
......@@ -514,7 +515,7 @@ impl Context {
let (sr_virtaddr, se_virtaddr, cr_virtaddr, ce_virtaddr) = {
// we can provide the kernel virtaddrs here, since they will automagically be
// captured by the `UserScheme`.
(handle.submission_ring_virtaddr(), handle.submission_entries_virtaddr(), handle.completion_ring_virtaddr(), handle.completion_entries_virtaddr())
(handle_arc.submission_ring_virtaddr(), handle_arc.submission_entries_virtaddr(), handle_arc.completion_ring_virtaddr(), handle_arc.completion_entries_virtaddr())
};
let info = IoUringRecvInfo {
......
......@@ -41,7 +41,7 @@
#![deny(unreachable_patterns)]
#![feature(allocator_api)]
#![feature(asm)]
#![feature(llvm_asm)]
#![feature(concat_idents)]
#![feature(const_fn)]
#![feature(core_intrinsics)]
......
......@@ -5,6 +5,7 @@ use core::ptr::NonNull;
use core::sync::atomic::{self, AtomicUsize, Ordering};
use core::{cmp, mem, ptr, task};
use alloc::boxed::Box;
use alloc::collections::{BinaryHeap, BTreeMap, BTreeSet};
use alloc::sync::{Arc, Weak};
......@@ -262,14 +263,14 @@ impl Handle {
*self.state.lock()
}
pub fn transition_into_initialized_state(&self, init: &IoUringCreateInfo) {
let mut state_lock = handle.state.lock();
let mut state_lock = self.state.lock();
if let &HandleState::Initialized { .. } = &*state_lock {
return Err(Error::new(EINVAL));
}
*state_lock = HandleState::Initialized;
handle.runtime_state.call_once(move || HandleRuntimeState {
self.runtime_state.call_once(move || HandleRuntimeState {
version: init.version,
flags: IoUringCreateFlags::from_bits_truncate(init.flags),
sq_entry_count: init.sq_entry_count,
......@@ -281,7 +282,7 @@ impl Handle {
last_cq_push_epoch: CachePadded(AtomicUsize::new(0)),
last_cq_pop_epoch: CachePadded(AtomicUsize::new(0)),
});
handle.refcount.fetch_add(1, Ordering::Relaxed);
self.refcount.fetch_add(1, Ordering::Relaxed);
}
pub fn transition_into_attached_state(&self, attached_context: ContextOrKernel) {
{
......@@ -512,7 +513,7 @@ impl Handle {
#[derive(Debug, Eq, PartialEq)]
struct QueueItem {
priority: u16,
future: Pin<Box<dyn Future + Send + 'static>>,
future: Pin<Box<dyn Future<Output = SqEntry64> + Send + 'static>>,
}
impl Ord for QueueItem {
......
......@@ -252,7 +252,7 @@ impl Scheme for IrqScheme {
}
}
fn seek(&self, id: usize, pos: usize, whence: usize) -> Result<usize> {
fn seek(&self, id: usize, pos: isize, whence: usize) -> Result<usize> {
let handles_guard = HANDLES.read();
let handle = handles_guard.as_ref().unwrap().get(&id).ok_or(Error::new(EBADF))?;
......
......@@ -142,7 +142,7 @@ impl Scheme for PipeScheme {
Ok(0)
}
fn seek(&self, _id: usize, _pos: usize, _whence: usize) -> Result<usize> {
fn seek(&self, _id: usize, _pos: isize, _whence: usize) -> Result<usize> {
Err(Error::new(ESPIPE))
}
}
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment