diff --git a/include/ChangeLog b/include/ChangeLog
index 49fb64dd635e67441b9ca0b53134784aa93052d3..0a9e820829591dc73ae58f60839af530454d9ef4 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2003-07-09  Bob Wilson  <bob.wilson@acm.org>
+
+	* xtensa-config.h: Undef all macros before defining them.
+
 2003-07-06  H.J. Lu <hongjiu.lu@intel.com>
 
 	* demangle.h: Support C++.
diff --git a/include/xtensa-config.h b/include/xtensa-config.h
index f643489aceec51e60b85e4b9b5d0105d4787fe29..4191c3685758f2b2fc37eb6591950d85895163ef 100644
--- a/include/xtensa-config.h
+++ b/include/xtensa-config.h
@@ -24,45 +24,116 @@
    Xtensa System Software Reference Manual for documentation of these
    macros.  */
 
+#undef XCHAL_HAVE_BE
 #define XCHAL_HAVE_BE			1
+
+#undef XCHAL_HAVE_DENSITY
 #define XCHAL_HAVE_DENSITY		1
+
+#undef XCHAL_HAVE_CONST16
 #define XCHAL_HAVE_CONST16		0
+
+#undef XCHAL_HAVE_ABS
 #define XCHAL_HAVE_ABS			1
+
+#undef XCHAL_HAVE_ADDX
 #define XCHAL_HAVE_ADDX			1
+
+#undef XCHAL_HAVE_L32R
 #define XCHAL_HAVE_L32R			1
+
+#undef XCHAL_HAVE_MAC16
 #define XCHAL_HAVE_MAC16		0
+
+#undef XCHAL_HAVE_MUL16
 #define XCHAL_HAVE_MUL16		0
+
+#undef XCHAL_HAVE_MUL32
 #define XCHAL_HAVE_MUL32		0
+
+#undef XCHAL_HAVE_DIV32
 #define XCHAL_HAVE_DIV32		0
+
+#undef XCHAL_HAVE_NSA
 #define XCHAL_HAVE_NSA			1
+
+#undef XCHAL_HAVE_MINMAX
 #define XCHAL_HAVE_MINMAX		0
+
+#undef XCHAL_HAVE_SEXT
 #define XCHAL_HAVE_SEXT			0
+
+#undef XCHAL_HAVE_LOOPS
 #define XCHAL_HAVE_LOOPS		1
+
+#undef XCHAL_HAVE_BOOLEANS
 #define XCHAL_HAVE_BOOLEANS		0
+
+#undef XCHAL_HAVE_FP
 #define XCHAL_HAVE_FP			0
+
+#undef XCHAL_HAVE_FP_DIV
 #define XCHAL_HAVE_FP_DIV		0
+
+#undef XCHAL_HAVE_FP_RECIP
 #define XCHAL_HAVE_FP_RECIP		0
+
+#undef XCHAL_HAVE_FP_SQRT
 #define XCHAL_HAVE_FP_SQRT		0
+
+#undef XCHAL_HAVE_FP_RSQRT
 #define XCHAL_HAVE_FP_RSQRT		0
+
+#undef XCHAL_HAVE_WINDOWED
 #define XCHAL_HAVE_WINDOWED		1
 
+
+#undef XCHAL_ICACHE_SIZE
 #define XCHAL_ICACHE_SIZE		8192
+
+#undef XCHAL_DCACHE_SIZE
 #define XCHAL_DCACHE_SIZE		8192
+
+#undef XCHAL_ICACHE_LINESIZE
 #define XCHAL_ICACHE_LINESIZE		16
+
+#undef XCHAL_DCACHE_LINESIZE
 #define XCHAL_DCACHE_LINESIZE		16
+
+#undef XCHAL_ICACHE_LINEWIDTH
 #define XCHAL_ICACHE_LINEWIDTH		4
+
+#undef XCHAL_DCACHE_LINEWIDTH
 #define XCHAL_DCACHE_LINEWIDTH		4
+
+#undef XCHAL_DCACHE_IS_WRITEBACK
 #define XCHAL_DCACHE_IS_WRITEBACK	0
 
+
+#undef XCHAL_HAVE_MMU
 #define XCHAL_HAVE_MMU			1
+
+#undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE	12
 
+
+#undef XCHAL_HAVE_DEBUG
 #define XCHAL_HAVE_DEBUG		1
+
+#undef XCHAL_NUM_IBREAK
 #define XCHAL_NUM_IBREAK		2
+
+#undef XCHAL_NUM_DBREAK
 #define XCHAL_NUM_DBREAK		2
+
+#undef XCHAL_DEBUGLEVEL
 #define XCHAL_DEBUGLEVEL		4
 
-#define XCHAL_EXTRA_SA_SIZE             0
-#define XCHAL_EXTRA_SA_ALIGN            1
+
+#undef XCHAL_EXTRA_SA_SIZE
+#define XCHAL_EXTRA_SA_SIZE		0
+
+#undef XCHAL_EXTRA_SA_ALIGN
+#define XCHAL_EXTRA_SA_ALIGN		1
 
 #endif /* !XTENSA_CONFIG_H */