From 1f428eb09658d052151f439d3e76f02820c5502d Mon Sep 17 00:00:00 2001
From: uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri, 10 Nov 2006 08:45:47 +0000
Subject: [PATCH] PR target/29777 * config/i386/sse.md
(smulv8hi3_highpart): Change from define_insn to define_expand.
(umulv8hi3_highpart): Ditto. (vec_widen_smult_hi_v8hi): New expander.
(vec_widen_smult_lo_v8hi): Ditto.
testsuite/ChangeLog:
PR target/29777
* lib/target-supports.exp (vect_widen_mult_hi_to_si): Add i?86-*-*
and x86_64-*-* targets.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@118649 138bc75d-0d04-0410-961f-82ee72b054a4
---
gcc/ChangeLog | 9 ++++++
gcc/config/i386/sse.md | 44 +++++++++++++++++++++++++--
gcc/testsuite/ChangeLog | 6 ++++
gcc/testsuite/lib/target-supports.exp | 4 ++-
4 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9c2b5891a983..6ca8f7ae8aee 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2006-11-10 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/29777
+ * config/i386/sse.md (smulv8hi3_highpart): Change from define_insn
+ to define_expand.
+ (umulv8hi3_highpart): Ditto.
+ (vec_widen_smult_hi_v8hi): New expander.
+ (vec_widen_smult_lo_v8hi): Ditto.
+
2006-11-09 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* builtins.c (do_mpfr_arg3): New.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 9985b7d479cd..460937ffc000 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2620,7 +2620,7 @@
[(set_attr "type" "sseimul")
(set_attr "mode" "TI")])
-(define_insn "smulv8hi3_highpart"
+(define_expand "smulv8hi3_highpart"
[(set (match_operand:V8HI 0 "register_operand" "")
(truncate:V8HI
(lshiftrt:V8SI
@@ -2648,7 +2648,7 @@
[(set_attr "type" "sseimul")
(set_attr "mode" "TI")])
-(define_insn "umulv8hi3_highpart"
+(define_expand "umulv8hi3_highpart"
[(set (match_operand:V8HI 0 "register_operand" "")
(truncate:V8HI
(lshiftrt:V8SI
@@ -2818,6 +2818,46 @@
DONE;
})
+(define_expand "vec_widen_smult_hi_v8hi"
+ [(match_operand:V4SI 0 "register_operand" "")
+ (match_operand:V8HI 1 "register_operand" "")
+ (match_operand:V8HI 2 "register_operand" "")]
+ "TARGET_SSE2"
+{
+ rtx op1, op2, t1, t2, dest;
+
+ op1 = operands[1];
+ op2 = operands[2];
+ t1 = gen_reg_rtx (V8HImode);
+ t2 = gen_reg_rtx (V8HImode);
+ dest = gen_lowpart (V8HImode, operands[0]);
+
+ emit_insn (gen_mulv8hi3 (t1, op1, op2));
+ emit_insn (gen_smulv8hi3_highpart (t2, op1, op2));
+ emit_insn (gen_vec_interleave_highv8hi (dest, t1, t2));
+ DONE;
+})
+
+(define_expand "vec_widen_smult_lo_v8hi"
+ [(match_operand:V4SI 0 "register_operand" "")
+ (match_operand:V8HI 1 "register_operand" "")
+ (match_operand:V8HI 2 "register_operand" "")]
+ "TARGET_SSE2"
+{
+ rtx op1, op2, t1, t2, dest;
+
+ op1 = operands[1];
+ op2 = operands[2];
+ t1 = gen_reg_rtx (V8HImode);
+ t2 = gen_reg_rtx (V8HImode);
+ dest = gen_lowpart (V8HImode, operands[0]);
+
+ emit_insn (gen_mulv8hi3 (t1, op1, op2));
+ emit_insn (gen_smulv8hi3_highpart (t2, op1, op2));
+ emit_insn (gen_vec_interleave_lowv8hi (dest, t1, t2));
+ DONE;
+})
+
(define_expand "vec_widen_umult_hi_v8hi"
[(match_operand:V4SI 0 "register_operand" "")
(match_operand:V8HI 1 "register_operand" "")
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 659aa50cac3a..ec8b83d9eaa3 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2006-11-10 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/29777
+ * lib/target-supports.exp (vect_widen_mult_hi_to_si): Add i?86-*-*
+ and x86_64-*-* targets.
+
2006-11-09 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* gcc.dg/torture/builtin-math-2.c: Test builtin fma.
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 8e263a352d7d..2947c082719e 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1603,7 +1603,9 @@ proc check_effective_target_vect_widen_mult_hi_to_si { } {
} else {
set et_vect_widen_mult_hi_to_si_saved 0
}
- if { [istarget powerpc*-*-*] } {
+ if { [istarget powerpc*-*-*]
+ || [istarget i?86-*-*]
+ || [istarget x86_64-*-*] } {
set et_vect_widen_mult_hi_to_si_saved 1
}
}
--
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