From 3f40ca2f8575e0d721b22f639206ecd3d904a440 Mon Sep 17 00:00:00 2001
From: hp <hp@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue, 19 Apr 2005 16:01:38 +0000
Subject: [PATCH] * os_dep.c, include/private/gc_locks.h: Import CRIS
port by Simon Posnjak from gc6.4. * include/private/gcconfig.h:
Ditto. Add M32R note from gc6.4.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@98414 138bc75d-0d04-0410-961f-82ee72b054a4
---
boehm-gc/ChangeLog | 6 ++++++
boehm-gc/include/private/gc_locks.h | 24 ++++++++++++++++++++++++
boehm-gc/include/private/gcconfig.h | 23 ++++++++++++++++++++++-
boehm-gc/os_dep.c | 6 +++++-
4 files changed, 57 insertions(+), 2 deletions(-)
diff --git a/boehm-gc/ChangeLog b/boehm-gc/ChangeLog
index 87ca45c771dc..2645277d7cc9 100644
--- a/boehm-gc/ChangeLog
+++ b/boehm-gc/ChangeLog
@@ -1,3 +1,9 @@
+2005-04-19 Hans-Peter Nilsson <hp@axis.com>
+
+ * os_dep.c, include/private/gc_locks.h: Import CRIS port by
+ Simon Posnjak from gc6.4.
+ * include/private/gcconfig.h: Ditto. Add M32R note from gc6.4.
+
2005-04-17 David S. Miller <davem@davemloft.net>
* include/private/gcconfig.h (sparc-linux): Use LINUX_STACKBOTTOM.
diff --git a/boehm-gc/include/private/gc_locks.h b/boehm-gc/include/private/gc_locks.h
index 775176b31519..46605caf72da 100644
--- a/boehm-gc/include/private/gc_locks.h
+++ b/boehm-gc/include/private/gc_locks.h
@@ -215,6 +215,30 @@
}
# define GC_TEST_AND_SET_DEFINED
# endif /* ARM32 */
+# ifdef CRIS
+ inline static int GC_test_and_set(volatile unsigned int *addr) {
+ /* Ripped from linuxthreads/sysdeps/cris/pt-machine.h. */
+ /* Included with Hans-Peter Nilsson's permission. */
+ register unsigned long int ret;
+
+ /* Note the use of a dummy output of *addr to expose the write.
+ * The memory barrier is to stop *other* writes being moved past
+ * this code.
+ */
+ __asm__ __volatile__("clearf\n"
+ "0:\n\t"
+ "movu.b [%2],%0\n\t"
+ "ax\n\t"
+ "move.b %3,[%2]\n\t"
+ "bwf 0b\n\t"
+ "clearf"
+ : "=&r" (ret), "=m" (*addr)
+ : "r" (addr), "r" ((int) 1), "m" (*addr)
+ : "memory");
+ return ret;
+ }
+# define GC_TEST_AND_SET_DEFINED
+# endif /* CRIS */
# ifdef S390
inline static int GC_test_and_set(volatile unsigned int *addr) {
int ret;
diff --git a/boehm-gc/include/private/gcconfig.h b/boehm-gc/include/private/gcconfig.h
index a9ed7176ba6e..5013dbd596b2 100644
--- a/boehm-gc/include/private/gcconfig.h
+++ b/boehm-gc/include/private/gcconfig.h
@@ -229,6 +229,12 @@
# define ARM32
# define mach_type_known
# endif
+# if defined(LINUX) && defined(__cris__)
+# ifndef CRIS
+# define CRIS
+# endif
+# define mach_type_known
+# endif
# if defined(LINUX) && (defined(powerpc) || defined(__powerpc__) || defined(powerpc64) || defined(__powerpc64__))
# define POWERPC
# define mach_type_known
@@ -476,6 +482,8 @@
/* POWERPC ==> IBM/Apple PowerPC */
/* (MACOS(<=9),DARWIN(incl.MACOSX),*/
/* LINUX, NETBSD, NOSYS variants) */
+ /* CRIS ==> Axis Etrax */
+ /* M32R ==> Renesas M32R */
/*
@@ -1801,6 +1809,19 @@
# endif
#endif
+# ifdef CRIS
+# define MACH_TYPE "CRIS"
+# define CPP_WORDSZ 32
+# define ALIGNMENT 1
+# define OS_TYPE "LINUX"
+# define DYNAMIC_LOADING
+# define LINUX_STACKBOTTOM
+# define USE_GENERIC_PUSH_REGS
+# define SEARCH_FOR_DATA_START
+ extern int _end[];
+# define DATAEND (_end)
+# endif
+
# ifdef SH
# define MACH_TYPE "SH"
# define ALIGNMENT 4
@@ -2066,7 +2087,7 @@
# endif
# if defined(HP_PA) || defined(M88K) || defined(POWERPC) && !defined(DARWIN) \
- || defined(LINT) || defined(MSWINCE) || defined(ARM32) \
+ || defined(LINT) || defined(MSWINCE) || defined(ARM32) || defined(CRIS) \
|| (defined(I386) && defined(__LCC__))
/* Use setjmp based hack to mark from callee-save registers. */
/* The define should move to the individual platform */
diff --git a/boehm-gc/os_dep.c b/boehm-gc/os_dep.c
index 30c2b8bc4ab8..c4775c1978ba 100644
--- a/boehm-gc/os_dep.c
+++ b/boehm-gc/os_dep.c
@@ -2519,7 +2519,11 @@ SIG_PF GC_old_segv_handler; /* Also old MSWIN32 ACCESS_VIOLATION filter */
# if defined(ARM32)
char * addr = (char *)sc.fault_address;
# else
- --> architecture not supported
+# if defined(CRIS)
+ char * addr = (char *)sc.regs.csraddr;
+# else
+ --> architecture not supported
+# endif
# endif
# endif
# endif
--
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