diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 33bd10262222c2487aa4c42181373e204edfd9e1..ad6b37ed92820094ca0cfc6d61ddd2e0cd55b6e5 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2006-12-07 Bernd Schmidt <bernd.schmidt@analog.com> + + * config/bfin/bfin.c (print_operand): New modifier 'N' for constants. + * config/bfin/bfin.md (ssashiftv2hi3, ssashifthi3, lshiftv2hi3, + lshifthi3): Use it, and fix the order of alternatives. + 2006-12-07 Nick Clifton <nickc@redhat.com> * common.opt (record-gcc-switches): New command line switch. diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 48fcbd131496d5b05b786aa0d90167813c6a8b29..abfeaeec2b6fb338e1daacafb7da12e3461d4472 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -1381,6 +1381,8 @@ print_operand (FILE *file, rtx x, char code) x = GEN_INT ((INTVAL (x) >> 16) & 0xffff); else if (code == 'h') x = GEN_INT (INTVAL (x) & 0xffff); + else if (code == 'N') + x = GEN_INT (-INTVAL (x)); else if (code == 'X') x = GEN_INT (exact_log2 (0xffffffff & INTVAL (x))); else if (code == 'Y') diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index d6c5d7f55ba60af256842ea98f9c57f9b9774784..454232751937a19ee58f96e138edc3eb35e5af64 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -3312,8 +3312,8 @@ "" "@ %0 = ASHIFT %1 BY %2 (V, S)%! - %0 = %1 >>> %2 (V,S)%! - %0 = %1 << %2 (V,S)%!" + %0 = %1 << %2 (V,S)%! + %0 = %1 >>> %N2 (V,S)%!" [(set_attr "type" "dsp32")]) (define_insn "ssashifthi3" @@ -3326,8 +3326,8 @@ "" "@ %0 = ASHIFT %1 BY %2 (V, S)%! - %0 = %1 >>> %2 (V,S)%! - %0 = %1 << %2 (V,S)%!" + %0 = %1 << %2 (V,S)%! + %0 = %1 >>> %N2 (V,S)%!" [(set_attr "type" "dsp32")]) (define_insn "lshiftv2hi3" @@ -3340,8 +3340,8 @@ "" "@ %0 = LSHIFT %1 BY %2 (V)%! - %0 = %1 >> %2 (V)%! - %0 = %1 << %2 (V)%!" + %0 = %1 << %2 (V)%! + %0 = %1 >> %N2 (V)%!" [(set_attr "type" "dsp32")]) (define_insn "lshifthi3" @@ -3354,7 +3354,7 @@ "" "@ %0 = LSHIFT %1 BY %2 (V)%! - %0 = %1 >> %2 (V)%! - %0 = %1 << %2 (V)%!" + %0 = %1 << %2 (V)%! + %0 = %1 >> %N2 (V)%!" [(set_attr "type" "dsp32")])