diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5c67ec0e38cdf0ca0f02326a7c3c1550736f39d9..fcd042bbfc5d63f968e7fef1deb77b8dd6cdb617 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,25 @@
 Thu Mar 30 06:32:51 2000  Richard Kenner  <kenner@vlsi1.ultra.nyu.edu>
 
+	* calls.c (expand_call): Pass bit alignment to mark_reg_pointer.
+	* explow.c (memory_address, allocate_dynamic_stack_space): Likewise.
+	* function.c (assign_parms): Likewise.
+	* integrate.c (expand_inline_function): Likewise.
+	* stmt.c (expand_decl): Likewise.
+	(copy_rtx_and_substitute): Likewise.
+	* expr.c (expand_expr, expand_expr_unaligned): Likewise.
+ 	(clear_by_pieces): Fix error in last change.
+	* emit-rtl.c (init_emit): Set known registers alignment in bits.
+	* function.h (regno_pointer_align): Now unsigned.
+	* config/arm/arm.c (alignable_memory_operand): REGNO_POINTER_ALIGN
+	is in bits.
+	* config/i386/i386.c (aligned_operand): Likewise.
+	* config/sparc/sparc.c (mem_min_alignment): Likewise.
+	* config/alpha/alpha.c (aligned_memory_operand): Likewise.
+	(unaligned_memory_operand): Likewise.
+	(alpha_expand_block_move, alpha_expand_block_clear): Likewise.
+	Also make alignments and sizes unsigned and some whitespace cleanup.
+	(alpha_va_start): Do nothing if VALIST's type is error_mark_node.
+
 	* builtins.c (get_pointer_alignment): Use host_integerp & tree_low_cst.
 	(expand_builtin_apply): Pass alignment to emit_block_move in bits.
 	(expand_builtin_memcpy, expand_builtin_va_copy): Likewise.
@@ -26,7 +46,7 @@ Thu Mar 30 06:32:51 2000  Richard Kenner  <kenner@vlsi1.ultra.nyu.edu>
 	* expr.h (emit_cmp_insn, emit_cmp_and_jump_insns): Alignment unsigned.
 	* function.c (purge_addressof_1): Pass bit align to store_bit_field.
 	(assign_parms): Likewise to emit_group_store.
-	* optbas.c (prepare_cmp_insn): Alignment is in bits.
+	* optabs.c (prepare_cmp_insn): Alignment is in bits.
 	(emit_cmp_and_jump_insns, emit_cmp_insn): Likewise, and also unsigned.
 	* stmt.c (expand_value_return): Pass align in bits to emit_group_load.
 	(expand_return): Likewise to {extract,store}_bit_field.
diff --git a/gcc/calls.c b/gcc/calls.c
index 646f4b947f09d62e8474821de4e48666a28e7e4b..0148391a6c07e2843c734beafd74a5887cd6ef7c 100644
--- a/gcc/calls.c
+++ b/gcc/calls.c
@@ -2758,10 +2758,7 @@ expand_call (exp, target, ignore)
 
 	  /* Mark the return value as a pointer if needed.  */
 	  if (TREE_CODE (TREE_TYPE (exp)) == POINTER_TYPE)
-	    {
-	      tree pointed_to = TREE_TYPE (TREE_TYPE (exp));
-	      mark_reg_pointer (temp, TYPE_ALIGN (pointed_to) / BITS_PER_UNIT);
-	    }
+	    mark_reg_pointer (temp, TYPE_ALIGN (TREE_TYPE (TREE_TYPE (exp))));
 
 	  /* Construct an "equal form" for the value which mentions all the
 	     arguments in order as well as the function name.  */
@@ -2795,7 +2792,7 @@ expand_call (exp, target, ignore)
 
 	  /* The return value from a malloc-like function is a pointer. */
 	  if (TREE_CODE (TREE_TYPE (exp)) == POINTER_TYPE)
-	    mark_reg_pointer (temp, BIGGEST_ALIGNMENT / BITS_PER_UNIT);
+	    mark_reg_pointer (temp, BIGGEST_ALIGNMENT);
 
 	  emit_move_insn (temp, valreg);
 
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 7c53f52932b83e75c0a96bf5f280de0933afe985..a547a9292ac68c7b1dee08883672ff8c0dcd049c 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -828,8 +828,7 @@ aligned_memory_operand (op, mode)
       base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
     }
 
-  return (GET_CODE (base) == REG
-	  && REGNO_POINTER_ALIGN (REGNO (base)) >= 4);
+  return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) >= 32);
 }
 
 /* Similar, but return 1 if OP is a MEM which is not alignable.  */
@@ -873,8 +872,7 @@ unaligned_memory_operand (op, mode)
       base = (GET_CODE (op) == PLUS ? XEXP (op, 0) : op);
     }
 
-  return (GET_CODE (base) == REG
-	  && REGNO_POINTER_ALIGN (REGNO (base)) < 4);
+  return (GET_CODE (base) == REG && REGNO_POINTER_ALIGN (REGNO (base)) < 32);
 }
 
 /* Return 1 if OP is either a register or an unaligned memory location.  */
@@ -2501,77 +2499,69 @@ alpha_expand_block_move (operands)
   rtx bytes_rtx	= operands[2];
   rtx align_rtx = operands[3];
   HOST_WIDE_INT orig_bytes = INTVAL (bytes_rtx);
-  HOST_WIDE_INT bytes = orig_bytes;
-  HOST_WIDE_INT src_align = INTVAL (align_rtx);
-  HOST_WIDE_INT dst_align = src_align;
-  rtx orig_src	= operands[1];
-  rtx orig_dst	= operands[0];
-  rtx data_regs[2*MAX_MOVE_WORDS+16];
+  unsigned HOST_WIDE_INT bytes = orig_bytes;
+  unsigned HOST_WIDE_INT src_align = INTVAL (align_rtx) * BITS_PER_UNIT;
+  unsigned HOST_WIDE_INT dst_align = src_align;
+  rtx orig_src = operands[1];
+  rtx orig_dst = operands[0];
+  rtx data_regs[2 * MAX_MOVE_WORDS + 16];
   rtx tmp;
-  int i, words, ofs, nregs = 0;
+  unsigned int i, words, ofs, nregs = 0;
   
-  if (bytes <= 0)
+  if (orig_bytes <= 0)
     return 1;
-  if (bytes > MAX_MOVE_WORDS*8)
+  else if (bytes > MAX_MOVE_WORDS * BITS_PER_UNIT)
     return 0;
 
   /* Look for additional alignment information from recorded register info.  */
 
   tmp = XEXP (orig_src, 0);
   if (GET_CODE (tmp) == REG)
-    {
-      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > src_align)
-	src_align = REGNO_POINTER_ALIGN (REGNO (tmp));
-    }
+    src_align = MAX (src_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
   else if (GET_CODE (tmp) == PLUS
 	   && GET_CODE (XEXP (tmp, 0)) == REG
 	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
     {
-      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
-      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+      unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
 
       if (a > src_align)
 	{
-          if (a >= 8 && c % 8 == 0)
-	    src_align = 8;
-          else if (a >= 4 && c % 4 == 0)
-	    src_align = 4;
-          else if (a >= 2 && c % 2 == 0)
-	    src_align = 2;
+          if (a >= 64 && c % 8 == 0)
+	    src_align = 64;
+          else if (a >= 32 && c % 4 == 0)
+	    src_align = 32;
+          else if (a >= 16 && c % 2 == 0)
+	    src_align = 16;
 	}
     }
 	
   tmp = XEXP (orig_dst, 0);
   if (GET_CODE (tmp) == REG)
-    {
-      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > dst_align)
-	dst_align = REGNO_POINTER_ALIGN (REGNO (tmp));
-    }
+    dst_align = MAX (dst_align, REGNO_POINTER_ALIGN (REGNO (tmp)));
   else if (GET_CODE (tmp) == PLUS
 	   && GET_CODE (XEXP (tmp, 0)) == REG
 	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
     {
-      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
-      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+      unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
 
       if (a > dst_align)
 	{
-          if (a >= 8 && c % 8 == 0)
-	    dst_align = 8;
-          else if (a >= 4 && c % 4 == 0)
-	    dst_align = 4;
-          else if (a >= 2 && c % 2 == 0)
-	    dst_align = 2;
+          if (a >= 64 && c % 8 == 0)
+	    dst_align = 64;
+          else if (a >= 32 && c % 4 == 0)
+	    dst_align = 32;
+          else if (a >= 16 && c % 2 == 0)
+	    dst_align = 16;
 	}
     }
 
-  /*
-   * Load the entire block into registers.
-   */
-
+  /* Load the entire block into registers.  */
   if (GET_CODE (XEXP (orig_src, 0)) == ADDRESSOF)
     {
       enum machine_mode mode;
+
       tmp = XEXP (XEXP (orig_src, 0), 0);
 
       /* Don't use the existing register if we're reading more than
@@ -2589,6 +2579,7 @@ alpha_expand_block_move (operands)
 	    }
 	  else
 	    data_regs[nregs++] = gen_lowpart (mode, tmp);
+
 	  goto src_done;
 	}
 
@@ -2598,50 +2589,48 @@ alpha_expand_block_move (operands)
     }
 
   ofs = 0;
-  if (src_align >= 8 && bytes >= 8)
+  if (src_align >= 64 && bytes >= 8)
     {
       words = bytes / 8;
 
       for (i = 0; i < words; ++i)
-	data_regs[nregs+i] = gen_reg_rtx(DImode);
+	data_regs[nregs + i] = gen_reg_rtx(DImode);
 
       for (i = 0; i < words; ++i)
-	{
-	  emit_move_insn (data_regs[nregs+i],
-			  change_address (orig_src, DImode,
-					  plus_constant (XEXP (orig_src, 0),
-							 ofs + i*8)));
-	}
+	emit_move_insn (data_regs[nregs + i],
+			change_address (orig_src, DImode,
+					plus_constant (XEXP (orig_src, 0), 
+						       ofs + i * 8)));
 
       nregs += words;
       bytes -= words * 8;
       ofs += words * 8;
     }
-  if (src_align >= 4 && bytes >= 4)
+
+  if (src_align >= 32 && bytes >= 4)
     {
       words = bytes / 4;
 
       for (i = 0; i < words; ++i)
-	data_regs[nregs+i] = gen_reg_rtx(SImode);
+	data_regs[nregs + i] = gen_reg_rtx(SImode);
 
       for (i = 0; i < words; ++i)
-	{
-	  emit_move_insn (data_regs[nregs+i],
-			  change_address (orig_src, SImode,
-					  plus_constant (XEXP (orig_src, 0),
-							 ofs + i*4)));
-	}
+	emit_move_insn (data_regs[nregs + i],
+			change_address (orig_src, SImode,
+					plus_constant (XEXP (orig_src, 0),
+						       ofs + i * 4)));
 
       nregs += words;
       bytes -= words * 4;
       ofs += words * 4;
     }
+
   if (bytes >= 16)
     {
       words = bytes / 8;
 
       for (i = 0; i < words+1; ++i)
-	data_regs[nregs+i] = gen_reg_rtx(DImode);
+	data_regs[nregs + i] = gen_reg_rtx(DImode);
 
       alpha_expand_unaligned_load_words (data_regs + nregs, orig_src,
 					 words, ofs);
@@ -2650,23 +2639,26 @@ alpha_expand_block_move (operands)
       bytes -= words * 8;
       ofs += words * 8;
     }
-  if (!TARGET_BWX && bytes >= 8)
+
+  if (! TARGET_BWX && bytes >= 8)
     {
       data_regs[nregs++] = tmp = gen_reg_rtx (DImode);
       alpha_expand_unaligned_load (tmp, orig_src, 8, ofs, 0);
       bytes -= 8;
       ofs += 8;
     }
-  if (!TARGET_BWX && bytes >= 4)
+
+  if (! TARGET_BWX && bytes >= 4)
     {
       data_regs[nregs++] = tmp = gen_reg_rtx (SImode);
       alpha_expand_unaligned_load (tmp, orig_src, 4, ofs, 0);
       bytes -= 4;
       ofs += 4;
     }
+
   if (bytes >= 2)
     {
-      if (src_align >= 2)
+      if (src_align >= 16)
 	{
 	  do {
 	    data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
@@ -2678,7 +2670,8 @@ alpha_expand_block_move (operands)
 	    ofs += 2;
 	  } while (bytes >= 2);
 	}
-      else if (!TARGET_BWX)
+
+      else if (! TARGET_BWX)
 	{
 	  data_regs[nregs++] = tmp = gen_reg_rtx (HImode);
 	  alpha_expand_unaligned_load (tmp, orig_src, 2, ofs, 0);
@@ -2686,6 +2679,7 @@ alpha_expand_block_move (operands)
 	  ofs += 2;
 	}
     }
+
   while (bytes > 0)
     {
       data_regs[nregs++] = tmp = gen_reg_rtx (QImode);
@@ -2696,14 +2690,13 @@ alpha_expand_block_move (operands)
       bytes -= 1;
       ofs += 1;
     }
+
  src_done:
 
-  if (nregs > (int)(sizeof(data_regs)/sizeof(*data_regs)))
-    abort();
+  if (nregs > sizeof data_regs / sizeof *data_regs)
+    abort ();
 
-  /*
-   * Now save it back out again.
-   */
+  /* Now save it back out again.  */
 
   i = 0, ofs = 0;
 
@@ -2721,15 +2714,14 @@ alpha_expand_block_move (operands)
 	      i = 1;
 	      goto dst_done;
 	    }
+
 	  else if (nregs == 2 && mode == TImode)
 	    {
 	      /* Undo the subregging done above when copying between
 		 two TImode registers.  */
 	      if (GET_CODE (data_regs[0]) == SUBREG
 		  && GET_MODE (SUBREG_REG (data_regs[0])) == TImode)
-		{
-		  emit_move_insn (tmp, SUBREG_REG (data_regs[0]));
-		}
+		emit_move_insn (tmp, SUBREG_REG (data_regs[0]));
 	      else
 		{
 		  rtx seq;
@@ -2760,7 +2752,7 @@ alpha_expand_block_move (operands)
     }
 
   /* Write out the data in whatever chunks reading the source allowed.  */
-  if (dst_align >= 8)
+  if (dst_align >= 64)
     {
       while (i < nregs && GET_MODE (data_regs[i]) == DImode)
 	{
@@ -2772,7 +2764,8 @@ alpha_expand_block_move (operands)
 	  i++;
 	}
     }
-  if (dst_align >= 4)
+
+  if (dst_align >= 32)
     {
       /* If the source has remaining DImode regs, write them out in
 	 two pieces.  */
@@ -2787,7 +2780,7 @@ alpha_expand_block_move (operands)
 			  gen_lowpart (SImode, data_regs[i]));
 	  emit_move_insn (change_address (orig_dst, SImode,
 					  plus_constant (XEXP (orig_dst, 0),
-							 ofs+4)),
+							 ofs + 4)),
 			  gen_lowpart (SImode, tmp));
 	  ofs += 8;
 	  i++;
@@ -2803,18 +2796,20 @@ alpha_expand_block_move (operands)
 	  i++;
 	}
     }
+
   if (i < nregs && GET_MODE (data_regs[i]) == DImode)
     {
       /* Write out a remaining block of words using unaligned methods.  */
 
-      for (words = 1; i+words < nregs ; ++words)
-	if (GET_MODE (data_regs[i+words]) != DImode)
+      for (words = 1; i + words < nregs; words++)
+	if (GET_MODE (data_regs[i + words]) != DImode)
 	  break;
 
       if (words == 1)
 	alpha_expand_unaligned_store (orig_dst, data_regs[i], 8, ofs);
       else
-        alpha_expand_unaligned_store_words (data_regs+i, orig_dst, words, ofs);
+        alpha_expand_unaligned_store_words (data_regs + i, orig_dst,
+					    words, ofs);
      
       i += words;
       ofs += words * 8;
@@ -2830,7 +2825,7 @@ alpha_expand_block_move (operands)
       i++;
     }
 
-  if (dst_align >= 2)
+  if (dst_align >= 16)
     while (i < nregs && GET_MODE (data_regs[i]) == HImode)
       {
 	emit_move_insn (change_address (orig_dst, HImode,
@@ -2847,6 +2842,7 @@ alpha_expand_block_move (operands)
 	i++;
 	ofs += 2;
       }
+
   while (i < nregs && GET_MODE (data_regs[i]) == QImode)
     {
       emit_move_insn (change_address (orig_dst, QImode,
@@ -2856,10 +2852,11 @@ alpha_expand_block_move (operands)
       i++;
       ofs += 1;
     }
+
  dst_done:
 
   if (i != nregs)
-    abort();
+    abort ();
 
   return 1;
 }
@@ -2870,42 +2867,40 @@ alpha_expand_block_clear (operands)
 {
   rtx bytes_rtx	= operands[1];
   rtx align_rtx = operands[2];
-  HOST_WIDE_INT bytes = INTVAL (bytes_rtx);
-  HOST_WIDE_INT align = INTVAL (align_rtx);
-  rtx orig_dst	= operands[0];
+  HOST_WIDE_INT orig_bytes = INTVAL (bytes_rtx);
+  unsigned HOST_WIDE_INT bytes = orig_bytes;
+  unsigned HOST_WIDE_INT align = INTVAL (align_rtx);
+  rtx orig_dst = operands[0];
   rtx tmp;
-  HOST_WIDE_INT i, words, ofs = 0;
+  unsigned HOST_WIDE_INT i, words, ofs = 0;
   
-  if (bytes <= 0)
+  if (orig_bytes <= 0)
     return 1;
   if (bytes > MAX_MOVE_WORDS*8)
     return 0;
 
   /* Look for stricter alignment.  */
-
   tmp = XEXP (orig_dst, 0);
   if (GET_CODE (tmp) == REG)
-    {
-      if (REGNO_POINTER_ALIGN (REGNO (tmp)) > align)
-	align = REGNO_POINTER_ALIGN (REGNO (tmp));
-    }
+    align = MAX (align, REGNO_POINTER_ALIGN (REGNO (tmp)));
   else if (GET_CODE (tmp) == PLUS
 	   && GET_CODE (XEXP (tmp, 0)) == REG
 	   && GET_CODE (XEXP (tmp, 1)) == CONST_INT)
     {
-      HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
-      int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
+      unsigned HOST_WIDE_INT c = INTVAL (XEXP (tmp, 1));
+      unsigned int a = REGNO_POINTER_ALIGN (REGNO (XEXP (tmp, 0)));
 
       if (a > align)
 	{
-          if (a >= 8 && c % 8 == 0)
-	    align = 8;
-          else if (a >= 4 && c % 4 == 0)
-	    align = 4;
-          else if (a >= 2 && c % 2 == 0)
-	    align = 2;
+          if (a >= 64 && c % 8 == 0)
+	    align = 64;
+          else if (a >= 32 && c % 4 == 0)
+	    align = 32;
+          else if (a >= 16 && c % 2 == 0)
+	    align = 16;
 	}
     }
+
   else if (GET_CODE (tmp) == ADDRESSOF)
     {
       enum machine_mode mode;
@@ -2925,36 +2920,34 @@ alpha_expand_block_clear (operands)
 
   /* Handle a block of contiguous words first.  */
 
-  if (align >= 8 && bytes >= 8)
+  if (align >= 64 && bytes >= 8)
     {
       words = bytes / 8;
 
       for (i = 0; i < words; ++i)
-	{
-	  emit_move_insn (change_address(orig_dst, DImode,
-					 plus_constant (XEXP (orig_dst, 0),
-							ofs + i*8)),
+	emit_move_insn (change_address(orig_dst, DImode,
+				       plus_constant (XEXP (orig_dst, 0),
+						      ofs + i * 8)),
 			  const0_rtx);
-	}
 
       bytes -= words * 8;
       ofs += words * 8;
     }
-  if (align >= 4 && bytes >= 4)
+
+  if (align >= 16 && bytes >= 4)
     {
       words = bytes / 4;
 
       for (i = 0; i < words; ++i)
-	{
-	  emit_move_insn (change_address (orig_dst, SImode,
-					  plus_constant (XEXP (orig_dst, 0),
-							 ofs + i*4)),
-			  const0_rtx);
-	}
+	emit_move_insn (change_address (orig_dst, SImode,
+					plus_constant (XEXP (orig_dst, 0),
+						       ofs + i * 4)),
+			const0_rtx);
 
       bytes -= words * 4;
       ofs += words * 4;
     }
+
   if (bytes >= 16)
     {
       words = bytes / 8;
@@ -2968,21 +2961,23 @@ alpha_expand_block_clear (operands)
   /* Next clean up any trailing pieces.  We know from the contiguous
      block move that there are no aligned SImode or DImode hunks left.  */
 
-  if (!TARGET_BWX && bytes >= 8)
+  if (! TARGET_BWX && bytes >= 8)
     {
       alpha_expand_unaligned_store (orig_dst, const0_rtx, 8, ofs);
       bytes -= 8;
       ofs += 8;
     }
+
   if (!TARGET_BWX && bytes >= 4)
     {
       alpha_expand_unaligned_store (orig_dst, const0_rtx, 4, ofs);
       bytes -= 4;
       ofs += 4;
     }
+
   if (bytes >= 2)
     {
-      if (align >= 2)
+      if (align >= 16)
 	{
 	  do {
 	    emit_move_insn (change_address (orig_dst, HImode,
@@ -2993,13 +2988,14 @@ alpha_expand_block_clear (operands)
 	    ofs += 2;
 	  } while (bytes >= 2);
 	}
-      else if (!TARGET_BWX)
+      else if (! TARGET_BWX)
 	{
 	  alpha_expand_unaligned_store (orig_dst, const0_rtx, 2, ofs);
 	  bytes -= 2;
 	  ofs += 2;
 	}
     }
+
   while (bytes > 0)
     {
       emit_move_insn (change_address (orig_dst, QImode,
@@ -3012,7 +3008,6 @@ alpha_expand_block_clear (operands)
 
   return 1;
 }
-
 
 /* Adjust the cost of a scheduling dependency.  Return the new cost of
    a dependency LINK or INSN on DEP_INSN.  COST is the current cost.  */
@@ -3756,6 +3751,9 @@ alpha_va_start (stdarg_p, valist, nextarg)
   HOST_WIDE_INT offset;
   tree t, offset_field, base_field;
 
+  if (TREE_CODE (TREE_TYPE (valist)) == ERROR_MARK)
+    return;
+
   if (TARGET_OPEN_VMS)
     std_expand_builtin_va_start (stdarg_p, valist, nextarg);
 
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 6fe5707e565c8b3c8fc9e7833f5ab5c57d57353f..7bf05363b7797491370048d296cf46928d34be33 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2487,7 +2487,7 @@ alignable_memory_operand (op, mode)
 	       && (GET_CODE (reg = XEXP (op, 0)) == REG
 		   || (GET_CODE (XEXP (op, 0)) == SUBREG
 		       && GET_CODE (reg = SUBREG_REG (XEXP (op, 0))) == REG))))
-	  && REGNO_POINTER_ALIGN (REGNO (reg)) >= 4);
+	  && REGNO_POINTER_ALIGN (REGNO (reg)) >= 32);
 }
 
 /* Similar to s_register_operand, but does not allow hard integer 
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6696b8bff087bf574637f90130b368a7099c890c..c739bf62390fbaf07509a1e9fc0d342d518fe0f6 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1449,12 +1449,12 @@ aligned_operand (op, mode)
   if (parts.index)
     {
       if (parts.scale < 4
-	  && REGNO_POINTER_ALIGN (REGNO (parts.index)) < 4)
+	  && REGNO_POINTER_ALIGN (REGNO (parts.index)) < 32)
 	return 0;
     }
   if (parts.base)
     {
-      if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 4)
+      if (REGNO_POINTER_ALIGN (REGNO (parts.base)) < 32)
 	return 0;
     }
   if (parts.disp)
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 85a3d70f38e372dfb603caf359b342e36e8a086c..7c27bbc48d1cfdd121065cac77127bbb105cc006 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -2938,9 +2938,10 @@ mem_min_alignment (mem, desired)
 	     completed, we already matched with proper alignments.
 	     If not running global_alloc, reload might give us
 	     unaligned pointer to local stack though.  */
-	  if (((cfun != 0 && REGNO_POINTER_ALIGN (regno) >= desired)
+	  if (((cfun != 0
+		&& REGNO_POINTER_ALIGN (regno) >= desired * BITS_PER_UNIT)
 	       || (optimize && reload_completed))
-	      && ((INTVAL (offset) & (desired - 1)) == 0))
+	      && (INTVAL (offset) & (desired - 1)) == 0)
 	    return 1;
 	}
       else
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 70db81c672fa84cf59551d107de3ac10dd7ba065..cf8f5232e6601aef46ecf0cea415fb7883196906 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -3839,21 +3839,16 @@ init_emit ()
   REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
 
 #ifdef STACK_BOUNDARY
-  REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
-    = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
-
-  REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
-    = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
-    = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
-    = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
-    = STACK_BOUNDARY / BITS_PER_UNIT;
-  REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
+  REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
+
+  REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
+  REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
 #endif
 
 #ifdef INIT_EXPANDERS
diff --git a/gcc/explow.c b/gcc/explow.c
index 99d7d98bc046f6fa211fe95594c4c56e0cff9b74..5eec1d7c28ba3bfd74f3a53d368bdb496aa00fd3 100644
--- a/gcc/explow.c
+++ b/gcc/explow.c
@@ -583,11 +583,11 @@ memory_address (mode, x)
   if (oldx == x)
     return x;
   else if (GET_CODE (x) == REG)
-    mark_reg_pointer (x, 1);
+    mark_reg_pointer (x, BITS_PER_UNIT);
   else if (GET_CODE (x) == PLUS
 	   && GET_CODE (XEXP (x, 0)) == REG
 	   && GET_CODE (XEXP (x, 1)) == CONST_INT)
-    mark_reg_pointer (XEXP (x, 0), 1);
+    mark_reg_pointer (XEXP (x, 0), BITS_PER_UNIT);
 
   /* OLDX may have been the address on a temporary.  Update the address
      to indicate that X is now used.  */
@@ -1305,7 +1305,7 @@ allocate_dynamic_stack_space (size, target, known_align)
       || REGNO (target) < FIRST_PSEUDO_REGISTER)
     target = gen_reg_rtx (Pmode);
 
-  mark_reg_pointer (target, known_align / BITS_PER_UNIT);
+  mark_reg_pointer (target, known_align);
 
   /* Perform the required allocation from the stack.  Some systems do
      this differently than simply incrementing/decrementing from the
diff --git a/gcc/expr.c b/gcc/expr.c
index dd95760702306f80bbd7fed3778c33d68ca17ab1..21daef7c5e0787a836d181ab38fc613a605937a9 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -2291,7 +2291,7 @@ clear_by_pieces (to, len, align)
 
   if (! SLOW_UNALIGNED_ACCESS (word_mode, align)
       || align > MOVE_MAX * BITS_PER_UNIT || align >= BIGGEST_ALIGNMENT)
-    align = MOVE_MAX;
+    align = MOVE_MAX * BITS_PER_UNIT;
 
   /* First move what we can in the largest integer mode, then go to
      successively smaller modes.  */
@@ -5973,8 +5973,7 @@ expand_expr (exp, target, tmode, modifier)
       if (temp != 0)
 	{
 	  if (GET_CODE (temp) == MEM && GET_CODE (XEXP (temp, 0)) == REG)
-	    mark_reg_pointer (XEXP (temp, 0),
-			      DECL_ALIGN (exp) / BITS_PER_UNIT);
+	    mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
 
 	  return temp;
 	}
@@ -6801,7 +6800,7 @@ expand_expr (exp, target, tmode, modifier)
 	    op0 = validize_mem (op0);
 
 	    if (GET_CODE (op0) == MEM && GET_CODE (XEXP (op0, 0)) == REG)
-	      mark_reg_pointer (XEXP (op0, 0), alignment / BITS_PER_UNIT);
+	      mark_reg_pointer (XEXP (op0, 0), alignment);
 
 	    op0 = extract_bit_field (op0, bitsize, bitpos,
 				     unsignedp, target, ext_mode, ext_mode,
@@ -6852,7 +6851,7 @@ expand_expr (exp, target, tmode, modifier)
 	  MEM_ALIAS_SET (op0) = get_alias_set (exp);
  
 	if (GET_CODE (XEXP (op0, 0)) == REG)
-	  mark_reg_pointer (XEXP (op0, 0), alignment / BITS_PER_UNIT);
+	  mark_reg_pointer (XEXP (op0, 0), alignment);
 
 	MEM_SET_IN_STRUCT_P (op0, 1);
 	MEM_VOLATILE_P (op0) |= volatilep;
@@ -8278,7 +8277,7 @@ expand_expr (exp, target, tmode, modifier)
 
       if (GET_CODE (op0) == REG
 	  && ! REG_USERVAR_P (op0))
-	mark_reg_pointer (op0, TYPE_ALIGN (TREE_TYPE (type)) / BITS_PER_UNIT);
+	mark_reg_pointer (op0, TYPE_ALIGN (TREE_TYPE (type)));
 
       /* If we might have had a temp slot, add an equivalent address
 	 for it.  */
@@ -8758,7 +8757,7 @@ expand_expr_unaligned (exp, palign)
 	  alignment >>= 1;
 
 	if (GET_CODE (XEXP (op0, 0)) == REG)
-	  mark_reg_pointer (XEXP (op0, 0), alignment / BITS_PER_UNIT);
+	  mark_reg_pointer (XEXP (op0, 0), alignment);
 
 	MEM_IN_STRUCT_P (op0) = 1;
 	MEM_VOLATILE_P (op0) |= volatilep;
diff --git a/gcc/function.c b/gcc/function.c
index b384f6acd233ed595cc470675ccf492f22324387..e74d8ba5b911419e8e91407d66d018822fa030c8 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -4763,8 +4763,8 @@ assign_parms (fndecl)
 	  /* For pointer data type, suggest pointer register.  */
 	  if (POINTER_TYPE_P (TREE_TYPE (parm)))
 	    mark_reg_pointer (parmreg,
-			      (TYPE_ALIGN (TREE_TYPE (TREE_TYPE (parm)))
-			       / BITS_PER_UNIT));
+			      TYPE_ALIGN (TREE_TYPE (TREE_TYPE (parm))));
+
 	}
       else
 	{
diff --git a/gcc/function.h b/gcc/function.h
index e43dd11da57e19b742ab46280eb1551db46d322a..884b98a3b734f464bb24c7184c316a960d9688ce 100644
--- a/gcc/function.h
+++ b/gcc/function.h
@@ -108,7 +108,7 @@ struct emit_status
   /* Indexed by pseudo register number, if nonzero gives the known alignment
      for that pseudo (if regno_pointer_flag is set).
      Allocated in parallel with regno_pointer_flag.  */
-  char *regno_pointer_align;
+  unsigned char *regno_pointer_align;
 
   /* Indexed by pseudo register number, gives the rtx for that pseudo.
      Allocated in parallel with regno_pointer_flag.  */
diff --git a/gcc/integrate.c b/gcc/integrate.c
index 163f59bd473efbfba1b7e49395dcfbc8c7f8e963..38dca61528d2d38abb5259eb52d6495cde986610 100644
--- a/gcc/integrate.c
+++ b/gcc/integrate.c
@@ -756,8 +756,7 @@ expand_inline_function (fndecl, parms, target, ignore, type,
       if (arg_vals[i] != 0 && GET_CODE (arg_vals[i]) == REG
 	  && POINTER_TYPE_P (TREE_TYPE (formal)))
 	mark_reg_pointer (arg_vals[i],
-			  (TYPE_ALIGN (TREE_TYPE (TREE_TYPE (formal)))
-			   / BITS_PER_UNIT));
+			  TYPE_ALIGN (TREE_TYPE (TREE_TYPE (formal))));
     }
 	
   /* Allocate the structures we use to remap things.  */
@@ -1761,8 +1760,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
 		= force_reg (Pmode, force_operand (loc, NULL_RTX));
 
 #ifdef STACK_BOUNDARY
-	      mark_reg_pointer (map->reg_map[regno],
-				STACK_BOUNDARY / BITS_PER_UNIT);
+	      mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
 #endif
 
 	      SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
@@ -1795,8 +1793,7 @@ copy_rtx_and_substitute (orig, map, for_lhs)
 		= force_reg (Pmode, force_operand (loc, NULL_RTX));
 
 #ifdef STACK_BOUNDARY
-	      mark_reg_pointer (map->reg_map[regno],
-				STACK_BOUNDARY / BITS_PER_UNIT);
+	      mark_reg_pointer (map->reg_map[regno], STACK_BOUNDARY);
 #endif
 
 	      SET_CONST_EQUIV_DATA (map, temp, loc, CONST_AGE_PARM);
diff --git a/gcc/stmt.c b/gcc/stmt.c
index ad1b2c6cbab6eb5fbe9111be8b6ae3c8e1b30c48..38fb857ac01dcde4efe9f6dcb8f49b3f3a256afa 100644
--- a/gcc/stmt.c
+++ b/gcc/stmt.c
@@ -3791,8 +3791,8 @@ expand_decl (decl)
 
       if (POINTER_TYPE_P (type))
 	mark_reg_pointer (DECL_RTL (decl),
-			  (TYPE_ALIGN (TREE_TYPE (TREE_TYPE (decl)))
-			   / BITS_PER_UNIT));
+			  TYPE_ALIGN (TREE_TYPE (TREE_TYPE (decl))));
+			  
     }
 
   else if (TREE_CODE (DECL_SIZE_UNIT (decl)) == INTEGER_CST