From d105e3e214b1e4b5a02875e81f5cd7decc813179 Mon Sep 17 00:00:00 2001
From: pbrook <pbrook@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue, 19 Sep 2006 13:19:24 +0000
Subject: [PATCH] 2006-09-19  Paul Brook  <paul@codesourcery.com>

	PR target/28516
	gcc/
	* config/arm/arm.c (arm_unwind_emit_set): Handle reg = sp + const.

	gcc/testsuite/
	* gcc.dg/nested-func-5.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@117056 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog                        |  5 +++++
 gcc/config/arm/arm.c                 |  9 +++++++++
 gcc/testsuite/ChangeLog              |  5 +++++
 gcc/testsuite/gcc.dg/nested-func-5.c | 13 +++++++++++++
 4 files changed, 32 insertions(+)
 create mode 100644 gcc/testsuite/gcc.dg/nested-func-5.c

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 515e4f97d213..030f172173d9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2006-09-19  Paul Brook  <paul@codesourcery.com>
+
+	PR target/28516
+	* config/arm/arm.c (arm_unwind_emit_set): Handle reg = sp + const.
+
 2006-09-17  Zdenek Dvorak <dvorakz@suse.cz>
 
 	PR tree-optimization/28887
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a36c0d791760..ff5831f4325e 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -15415,6 +15415,15 @@ arm_unwind_emit_set (FILE * asm_out_file, rtx p)
 	  /* Move from sp to reg.  */
 	  asm_fprintf (asm_out_file, "\t.movsp %r\n", REGNO (e0));
 	}
+     else if (GET_CODE (e1) == PLUS
+	      && GET_CODE (XEXP (e1, 0)) == REG
+	      && REGNO (XEXP (e1, 0)) == SP_REGNUM
+	      && GET_CODE (XEXP (e1, 1)) == CONST_INT)
+	{
+	  /* Set reg to offset from sp.  */
+	  asm_fprintf (asm_out_file, "\t.movsp %r, #%d\n",
+		       REGNO (e0), (int)INTVAL(XEXP (e1, 1)));
+	}
       else
 	abort ();
       break;
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f5d9a7a452cb..e643d1d50010 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2006-09-19  Paul Brook  <paul@codesourcery.com>
+
+	PR target/28516
+	* gcc.dg/nested-func-5.c: New test.
+
 2006-09-19  Ben Elliston  <bje@au.ibm.com>
 
 	* lib/target-supports.exp (check_effective_target_tls): Compile
diff --git a/gcc/testsuite/gcc.dg/nested-func-5.c b/gcc/testsuite/gcc.dg/nested-func-5.c
new file mode 100644
index 000000000000..5076dbd50497
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/nested-func-5.c
@@ -0,0 +1,13 @@
+/* { dg-do compile } */
+/* { dg-options "-fexceptions" } */
+/* PR28516: ICE generating ARM unwind directives for nested functions.  */
+
+void ex(int (*)(void));
+void foo(int i)
+{
+  int bar(void)
+  {
+    return i;
+  }
+  ex(bar);
+}
-- 
GitLab