From e28b9c2537c0e52675762c4173bdbfeb440f6dfc Mon Sep 17 00:00:00 2001
From: jsm28 <jsm28@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 16 Nov 2006 13:36:23 +0000
Subject: [PATCH] * config/rs6000/spe.md (frob_di_df_2): Handle
non-offsettable memory operand.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@118889 138bc75d-0d04-0410-961f-82ee72b054a4
---
gcc/ChangeLog | 5 +++++
gcc/config/rs6000/spe.md | 5 +++++
2 files changed, 10 insertions(+)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c5ae49aec635..fed1fb5e85a0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-16 Joseph Myers <joseph@codesourcery.com>
+
+ * config/rs6000/spe.md (frob_di_df_2): Handle non-offsettable
+ memory operand.
+
2006-11-16 Richard Earnshaw <rearnsha@arm.com>
* arm.md (abssi2): Allow Thumb as well. Use an SImode scratch for
diff --git a/gcc/config/rs6000/spe.md b/gcc/config/rs6000/spe.md
index 1ac1a8492c17..f2410dd29163 100644
--- a/gcc/config/rs6000/spe.md
+++ b/gcc/config/rs6000/spe.md
@@ -2223,6 +2223,11 @@
case 0:
return \"evmergehi %0,%1,%1\;mr %L0,%1\";
case 1:
+ /* If the address is not offsettable we need to load the whole
+ doubleword into a 64-bit register and then copy the high word
+ to form the correct output layout. */
+ if (!offsettable_nonstrict_memref_p (operands[1]))
+ return \"evldd%X1 %L0,%y1\;evmergehi %0,%L0,%L0\";
/* If the low-address word is used in the address, we must load
it last. Otherwise, load it first. Note that we cannot have
auto-increment in that case since the address register is
--
GitLab