diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e6cfa7cf548490d2be34580c21f0471524aec256..ad45886348ee52fafb1681901368703301533c4c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,16 @@
+2007-02-03 Kazu Hirata <kazu@codesourcery.com>
+
+ * c-decl.c, config/avr/avr.c, config/avr/avr.h,
+ config/m68k/m68k.c, config/m68k/netbsd-elf.h,
+ config/mn10300/mn10300.c, config/pdp11/pdp11.h,
+ config/rs6000/cell.md, config/rs6000/darwin.h,
+ config/sh/sh.md, config/sh/sh4-300.md, config/spu/spu.c,
+ config/spu/spu.md, cselib.c, expr.c, haifa-sched.c, hwint.h,
+ jump.c, reload.c, sched-deps.c, sched-int.h, tree-inline.c,
+ tree-profile.c, tree-ssa-live.h, tree-vrp.c: Fix comment
+ typos. Follow spelling conventions.
+ * doc/invoke.texi: Follow spelling conventions.
+
2007-02-03 Roger Sayle <roger@eyesopen.com>
* simplify-rtx.c (simplify_relational_operation_1): Implement some
diff --git a/gcc/c-decl.c b/gcc/c-decl.c
index 2f9ffc3b62203b4a6a2e156881e5f9d2b37244e5..3bdf70e12bae42ca20aa6ce4567604da415b65ee 100644
--- a/gcc/c-decl.c
+++ b/gcc/c-decl.c
@@ -64,7 +64,7 @@ Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
/* Set this to 1 if you want the standard ISO C99 semantics of 'inline'
when you specify -std=c99 or -std=gnu99, and to 0 if you want
- behaviour compatible with the nonstandard semantics implemented by
+ behavior compatible with the nonstandard semantics implemented by
GCC 2.95 through 4.2. */
#define WANT_C99_INLINE_SEMANTICS 1
diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c
index d222a53d3c07f29f1a1dcbdfa9d5082e17d63717..efe7b86e3e603b7794c5fc39fab498cfb561552f 100644
--- a/gcc/config/avr/avr.c
+++ b/gcc/config/avr/avr.c
@@ -5527,7 +5527,7 @@ avr_ret_register (void)
return 24;
}
-/* Ceate an RTX representing the place where a
+/* Create an RTX representing the place where a
library function returns a value of mode MODE. */
rtx
diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h
index 85ee38defa21e22383b479cb07a201094a5ec6c7..0c8a800dec33b7d5b36012b485048f764d8ce1d6 100644
--- a/gcc/config/avr/avr.h
+++ b/gcc/config/avr/avr.h
@@ -725,7 +725,7 @@ extern int avr_case_values_threshold;
#define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
%{!fenforce-eh-specs:-fno-enforce-eh-specs} \
%{!fexceptions:-fno-exceptions}"
-/* A C string constant that tells the GCC drvier program options to
+/* A C string constant that tells the GCC driver program options to
pass to `cc1plus'. */
#define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;\
diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c
index edf1dc61fe42f4ee121e5b7352c09746d68d37b8..225baed5ac62012cb61ec5daa5c8fbe3aad61225 100644
--- a/gcc/config/m68k/m68k.c
+++ b/gcc/config/m68k/m68k.c
@@ -462,7 +462,7 @@ override_options (void)
implementing architecture ARCH. -mcpu=CPU should override -march
and should generate code that runs on processor CPU, making free
use of any instructions that CPU understands. -mtune=UARCH applies
- on top of -mcpu or -march and optimises the code for UARCH. It does
+ on top of -mcpu or -march and optimizes the code for UARCH. It does
not change the target architecture. */
if (m68k_cpu_entry)
{
diff --git a/gcc/config/m68k/netbsd-elf.h b/gcc/config/m68k/netbsd-elf.h
index 13aca931013a4883fcc99b2bdcb9c6bded4330b6..2d4012f8ba9104cac8aeae79af443de2e341269b 100644
--- a/gcc/config/m68k/netbsd-elf.h
+++ b/gcc/config/m68k/netbsd-elf.h
@@ -69,7 +69,7 @@ Boston, MA 02110-1301, USA. */
/* Provide an ASM_SPEC appropriate for NetBSD m68k ELF targets. We need
- to passn PIC code generation options. */
+ to pass PIC code generation options. */
#undef ASM_SPEC
#define ASM_SPEC "%(asm_cpu_spec) %{fpic|fpie:-k} %{fPIC|fPIE:-k -K}"
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index f63d77846db5b99d74e3f6ff479abe4b4cf6d226..ae10f82aa41fd602e3b3ff4d360b00600af4f1c0 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -546,7 +546,7 @@ fp_regs_to_save (void)
/* Print a set of registers in the format required by "movm" and "ret".
Register K is saved if bit K of MASK is set. The data and address
registers can be stored individually, but the extended registers cannot.
- We assume that the mask alread takes that into account. For instance,
+ We assume that the mask already takes that into account. For instance,
bits 14 to 17 must have the same value. */
void
diff --git a/gcc/config/pdp11/pdp11.h b/gcc/config/pdp11/pdp11.h
index 2850fc2a53a207818f56b08b2dad8079a1a1f5df..a8e8d4d58bf17c06be0a9373fa7387b763e065d0 100644
--- a/gcc/config/pdp11/pdp11.h
+++ b/gcc/config/pdp11/pdp11.h
@@ -441,7 +441,7 @@ extern int current_first_parm_offset;
For the pdp11, this is nonzero to account for the return address.
1 - return address
2 - frame pointer (always saved, even when not used!!!!)
- -- chnage some day !!!:q!
+ -- change some day !!!:q!
*/
#define FIRST_PARM_OFFSET(FNDECL) 4
diff --git a/gcc/config/rs6000/cell.md b/gcc/config/rs6000/cell.md
index 17a07b585edb75137aeb23588deb0f023155963c..8b3a5a888ad1b6930b9a920b1ec7f351bee30f1e 100644
--- a/gcc/config/rs6000/cell.md
+++ b/gcc/config/rs6000/cell.md
@@ -25,7 +25,7 @@
;; This file simulate PPU processor unit backend of pipeline, maualP24.
;; manual P27, stall and flush points
;; IU, XU, VSU, dispatcher decodes and dispatch 2 insns per cycle in program
-;; order, the grouped adress are aligned by 8
+;; order, the grouped address are aligned by 8
;; This file only simulate one thread situation
;; XU executes all fixed point insns(3 units, a simple alu, a complex unit,
;; and load/store unit)
diff --git a/gcc/config/rs6000/darwin.h b/gcc/config/rs6000/darwin.h
index 48be0e994e9c060a2353855434268b31a38e6ffd..158b1be87f0293622789e739d074abbc0b346a89 100644
--- a/gcc/config/rs6000/darwin.h
+++ b/gcc/config/rs6000/darwin.h
@@ -401,7 +401,7 @@ do { \
macro in the Apple version of GCC, except that version supports
'mac68k' alignment, and that version uses the computed alignment
always for the first field of a structure. The first-field
- behaviour is dealt with by
+ behavior is dealt with by
darwin_rs6000_special_round_type_align. */
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
(TARGET_ALIGN_NATURAL ? (COMPUTED) \
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 0186ba5b30e4fab0f390255987ec5c3bc29093e4..c675478140b2ea24b8f465c79a8c5205bf7dafee 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -4771,7 +4771,7 @@ label:
; N.B. This should agree with LOAD_EXTEND_OP and movqi.
; Because we use zero extension, we can't provide signed QImode compares
-; using a simple compare or conditional banch insn.
+; using a simple compare or conditional branch insn.
(define_insn "truncdiqi2"
[(set (match_operand:QI 0 "general_movdst_operand" "=r,m")
(truncate:QI (match_operand:DI 1 "register_operand" "r,r")))]
diff --git a/gcc/config/sh/sh4-300.md b/gcc/config/sh/sh4-300.md
index ac107722df418ed4a42163e8dabdf85a362361f4..02cd8fd09e0a6a64acc8d880e7dbccb34865e810 100644
--- a/gcc/config/sh/sh4-300.md
+++ b/gcc/config/sh/sh4-300.md
@@ -187,7 +187,7 @@
;; Scheduling runs before reorg, so we approximate this by saying that we
;; want the call to be paired with a preceding insn.
;; In most cases, the insn that loads the address of the call should have
-;; a non-zero latency (mov rn,rm doesn't make sense since we could use rn
+;; a nonzero latency (mov rn,rm doesn't make sense since we could use rn
;; for the address then). Thus, a preceding insn that can be paired with
;; a call should be eligible for the delay slot.
;;
diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c
index 3a907f07d66dad403ce3fef9610d1a7ba4609bc4..5297a7b95504c7d36468f30b5f96acf16a731d25 100644
--- a/gcc/config/spu/spu.c
+++ b/gcc/config/spu/spu.c
@@ -2792,7 +2792,7 @@ spu_handle_vector_attribute (tree * node, tree name,
return NULL_TREE;
}
-/* Return non-zero if FUNC is a naked function. */
+/* Return nonzero if FUNC is a naked function. */
static int
spu_naked_function_p (tree func)
{
diff --git a/gcc/config/spu/spu.md b/gcc/config/spu/spu.md
index 8e8fad2d114d3b7b2036dde8fd06a20b46ae55f1..8dbeadff09862b8dcd7655df9fb386f744ea5d3b 100644
--- a/gcc/config/spu/spu.md
+++ b/gcc/config/spu/spu.md
@@ -55,7 +55,7 @@
(define_insn_reservation "FP7" 7 (eq_attr "type" "fp7")
"pipe0, fp, nothing*5")
-;; The behaviour of the double precision is that both pipes stall
+;; The behavior of the double precision is that both pipes stall
;; for 6 cycles and the the rest of the operation pipelines for
;; 7 cycles. The simplest way to model this is to simply ignore
;; the 6 cyle stall.
diff --git a/gcc/cselib.c b/gcc/cselib.c
index 39b948a42465de3386b1da6caa0f2a6184a6c37b..d821bcf90481fafef105190798968856aecfb413 100644
--- a/gcc/cselib.c
+++ b/gcc/cselib.c
@@ -1453,7 +1453,7 @@ cselib_process_insn (rtx insn)
if (n_useless_values > MAX_USELESS_VALUES
/* remove_useless_values is linear in the hash table size. Avoid
- quadratic behaviour for very large hashtables with very few
+ quadratic behavior for very large hashtables with very few
useless elements. */
&& (unsigned int)n_useless_values > cselib_hash_table->n_elements / 4)
remove_useless_values ();
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index c09e0387d7fadd75f5f14041aa2360081dd9a09c..4be7de1022bb26de7bffb67054d61cf9d443fbae 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -1658,7 +1658,7 @@ when used within the DSO@. Enabling this option can have a dramatic effect
on load and link times of a DSO as it massively reduces the size of the
dynamic export table when the library makes heavy use of templates.
-The behaviour of this switch is not quite the same as marking the
+The behavior of this switch is not quite the same as marking the
methods as hidden directly, because it does not affect static variables
local to the function or cause the compiler to deduce that
the function is defined in only one shared object.
diff --git a/gcc/expr.c b/gcc/expr.c
index 6e6090904c36af8f53ac2b23dbd54abe3a774d19..b49813ab2a94d105349442b8b446dbca59ffcb8c 100644
--- a/gcc/expr.c
+++ b/gcc/expr.c
@@ -8988,7 +8988,7 @@ string_constant (tree arg, tree *ptr_offset)
&& TREE_CODE (array) != VAR_DECL)
return 0;
- /* Check if the array has a non-zero lower bound. */
+ /* Check if the array has a nonzero lower bound. */
lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
if (!integer_zerop (lower_bound))
{
diff --git a/gcc/haifa-sched.c b/gcc/haifa-sched.c
index 87d7bd11910f623fecf1badbba4407214c827fc5..ed3545999695b786dafa0ed53f75559d9f855e98 100644
--- a/gcc/haifa-sched.c
+++ b/gcc/haifa-sched.c
@@ -684,7 +684,7 @@ dep_cost (dep_t link)
rtx dep_cost_rtx_link = alloc_INSN_LIST (NULL_RTX, NULL_RTX);
/* Make it self-cycled, so that if some tries to walk over this
- incomplete list he/she will be cought in an endless loop. */
+ incomplete list he/she will be caught in an endless loop. */
XEXP (dep_cost_rtx_link, 1) = dep_cost_rtx_link;
/* Targets use only REG_NOTE_KIND of the link. */
diff --git a/gcc/hwint.h b/gcc/hwint.h
index 9b28a3ada0783d80a44854bbc1c5a6357299493c..2f3fe4cb0b817440cc53e4be2e591038b08d5c4b 100644
--- a/gcc/hwint.h
+++ b/gcc/hwint.h
@@ -128,7 +128,7 @@ extern char sizeof_long_long_must_be_8[sizeof(long long) == 8 ? 1 : -1];
efficiently in hardware. (That is, the widest integer type that fits
in a hardware register.) Normally this is "long" but on some hosts it
should be "long long" or "__int64". This is no convenient way to
- autodect this, so such systems must set a flag in config.host; see there
+ autodetect this, so such systems must set a flag in config.host; see there
for details. */
#ifdef USE_LONG_LONG_FOR_WIDEST_FAST_INT
diff --git a/gcc/jump.c b/gcc/jump.c
index 567017004f5df8d6558aecef4a2ab4b476c5d4c2..d2a905bbbee407db6b090b6a8e3a731e04dab067 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -1639,7 +1639,7 @@ redirect_jump_2 (rtx jump, rtx olabel, rtx nlabel, int delete_unused,
{
rtx note;
- /* negative DELETE_UNUSED used to be used to signalize behaviour on
+ /* Negative DELETE_UNUSED used to be used to signalize behavior on
moving FUNCTION_END note. Just sanity check that no user still worry
about this. */
gcc_assert (delete_unused >= 0);
diff --git a/gcc/reload.c b/gcc/reload.c
index 50af5d5e36621be1cadd6b4a8fba19b1620539df..21c5ed20026c7f9e4773e0a5475b353506abe50e 100644
--- a/gcc/reload.c
+++ b/gcc/reload.c
@@ -1717,7 +1717,7 @@ combine_reloads (void)
return;
/* If there is a reload for part of the address of this operand, we would
- need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
+ need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
its life to the point where doing this combine would not lower the
number of spill registers needed. */
for (i = 0; i < n_reloads; i++)
diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 6de5296ecde93032a2cb4b25dbc6204f8f156a56..72d8e4f04cfc5462fc79808cf8521f195570feb0 100644
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -97,7 +97,7 @@ init_dep_1 (dep_t dep, rtx pro, rtx con, enum reg_note kind, ds_t ds)
/* Init DEP with the arguments.
While most of the scheduler (including targets) only need the major type
- of the dependency, it is convinient to hide full dep_status from them. */
+ of the dependency, it is convenient to hide full dep_status from them. */
void
init_dep (dep_t dep, rtx pro, rtx con, enum reg_note kind)
{
@@ -2425,7 +2425,7 @@ add_back_forw_dep (rtx insn, rtx elem, enum reg_note dep_type, ds_t ds)
gcc_assert (deps_list_consistent_p (INSN_BACK_DEPS (insn)));
}
-/* Remove a dependency refered by L. */
+/* Remove a dependency referred to by L. */
void
delete_back_forw_dep (dep_link_t l)
{
diff --git a/gcc/sched-int.h b/gcc/sched-int.h
index f47aab785e9a9d1e4572289e24c01bb81989b814..61b9cf259c04cdf843585fc36d61171f0485df62 100644
--- a/gcc/sched-int.h
+++ b/gcc/sched-int.h
@@ -142,8 +142,8 @@ void copy_deps_list_change_con (deps_list_t, deps_list_t, rtx);
void move_dep_link (dep_link_t, deps_list_t);
-/* Suppose we have a depedence Y between insn pro1 and con1, where pro1 has
- additional dependants con0 and con2, and con1 is dependant on additional
+/* Suppose we have a dependence Y between insn pro1 and con1, where pro1 has
+ additional dependents con0 and con2, and con1 is dependent on additional
insns pro0 and pro1:
.con0 pro0
diff --git a/gcc/tree-inline.c b/gcc/tree-inline.c
index d68190fa8993598664ada403dbd5b794a50fb444..def3af4ccdbb1625263453ede364ca3a40185473 100644
--- a/gcc/tree-inline.c
+++ b/gcc/tree-inline.c
@@ -2223,7 +2223,7 @@ estimate_num_insns_1 (tree *tp, int *walk_subtrees, void *data)
}
/* Estimate number of instructions that will be created by expanding EXPR.
- WEIGHTS contains weigths attributed to various constructs. */
+ WEIGHTS contains weights attributed to various constructs. */
int
estimate_num_insns (tree expr, eni_weights *weights)
diff --git a/gcc/tree-profile.c b/gcc/tree-profile.c
index b819665838521b0d06ea58463858f67d7fb159a3..bd7556a074a77331919dc3709803806802a18b84 100644
--- a/gcc/tree-profile.c
+++ b/gcc/tree-profile.c
@@ -64,7 +64,7 @@ static GTY(()) tree ptr_void;
/* Add code:
static gcov* __gcov_indirect_call_counters; // pointer to actual counter
- static void* __gcov_indirect_call_callee; // actual callee address
+ static void* __gcov_indirect_call_callee; // actual callee addres
*/
static void
tree_init_ic_make_global_vars (void)
diff --git a/gcc/tree-ssa-live.h b/gcc/tree-ssa-live.h
index 18dba67730d3fd9a810c354bb398bb10fc0f21f8..d0aeedf08df8c88199c227817527d789239c468c 100644
--- a/gcc/tree-ssa-live.h
+++ b/gcc/tree-ssa-live.h
@@ -46,7 +46,7 @@ Boston, MA 02110-1301, USA. */
change. (ie, it is truly a view since it doesn't change anything)
The final component of the data structure is the basevar map. This provides
- a list of all the different base variables which occue in a partition view,
+ a list of all the different base variables which occur in a partition view,
and a unique index for each one. Routines are provided to quickly produce
the base variable of a partition.
diff --git a/gcc/tree-vrp.c b/gcc/tree-vrp.c
index 8ed50a91268142f94c051e62256bb21823ff8b9d..2babe1a25b7cdaee2e6450cecd24977477c0a354 100644
--- a/gcc/tree-vrp.c
+++ b/gcc/tree-vrp.c
@@ -3481,7 +3481,7 @@ insert_range_assertions (void)
/* Checks one ARRAY_REF in REF, located at LOCUS. Ignores flexible arrays
and "struct" hacks. If VRP can determine that the
- array subscript is a contant, check if it is outside valid
+ array subscript is a constant, check if it is outside valid
range. If the array subscript is a RANGE, warn if it is
non-overlapping with valid range.
IGNORE_OFF_BY_ONE is true if the ARRAY_REF is inside a ADDR_EXPR. */