Commit 1f0ba2b9 authored by Jeremy Soller's avatar Jeremy Soller

Do not block on IRQ read, add more debugging to RTL8168/9

parent 71a97951
......@@ -128,7 +128,7 @@ impl SchemeMut for Rtl8168 {
i += 1;
}
println!("Transmit {}: Before: Control {:X}: TPPoll: {:X}", td_i, td.ctrl.read(), self.regs.tppoll.read());
println!("Transmit {}: Before: Control {:X}: Buffer {:X} TPPoll: {:X}", td_i, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read());
let eor = td.ctrl.read() & EOR;
td.ctrl.write(OWN | eor | FS | LS | i as u32);
......@@ -136,11 +136,11 @@ impl SchemeMut for Rtl8168 {
self.regs.tppoll.writef(1 << 6, true); //Notify of normal priority packet
for s in 0..10 {
println!("Transmit {}: {}: Control {:X}: TPPoll: {:X}", td_i, s, td.ctrl.read(), self.regs.tppoll.read());
println!("Transmit {}: {}: Control {:X}: Buffer {:X} TPPoll: {:X}", td_i, s, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read());
::std::thread::sleep_ms(1000);
}
println!("Transmit {}: After: Control {:X}: TPPoll: {:X}", td_i, td.ctrl.read(), self.regs.tppoll.read());
println!("Transmit {}: After: Control {:X}: Buffer {:X} TPPoll: {:X}", td_i, td.ctrl.read(), td.buffer.read(), self.regs.tppoll.read());
return Ok(i);
}
......@@ -204,6 +204,16 @@ impl Rtl8168 {
if isr & imr != 0 {
println!("RTL8168 ISR {:X} IMR {:X} ISR & IMR {:X}", isr, imr, isr & imr);
println!("CMD {:X} PHYS {:X} RMS {:X} MTPS {:X} RCR {:X} TCR {:X} RDSAR {:X} TNPDS {:X} THPDS {:X}",
self.regs.cmd.read(),
self.regs.phys_sts.read(),
self.regs.rms.read(),
self.regs.mtps.read(),
self.regs.rcr.read(),
self.regs.tcr.read(),
self.regs.rdsar[0].read(),
self.regs.tnpds[0].read(),
self.regs.thpds[0].read());
for (rd_i, rd) in self.receive_ring.iter_mut().enumerate() {
println!("RD {}: {:X}", rd_i, rd.ctrl.read());
}
......@@ -281,10 +291,10 @@ impl Rtl8168 {
self.regs.rdsar[1].write((self.receive_ring.physical() >> 32) as u32);
// Interrupt on tx error (bit 3), tx ok (bit 2), rx error(bit 1), and rx ok (bit 0)
self.regs.imr.write(1 << 15 | 1 << 14 | 1 << 7 | 1 << 6 | 1 << 4 | 1 << 3 | 1 << 2 | 1 << 1 | 1);
self.regs.imr.write(1 << 15 | 1 << 14 | 1 << 7 | 1 << 6 | 1 << 5 | 1 << 4 | 1 << 3 | 1 << 2 | 1 << 1 | 1);
// Set RX config - Accept broadcast (bit 3), multicast (bit 2), and unicast (bit 1)
self.regs.rcr.writef(0xE70E, true);
self.regs.rcr.write(0xE70E);
// Set TX config
self.regs.tcr.write(0x03010700);
......@@ -292,6 +302,17 @@ impl Rtl8168 {
// Lock config
self.regs.cmd_9346.write(0);
println!(" - Ready PHYS {:X} RDSAR {:X}", self.regs.phys_sts.read(), self.regs.rdsar[0].read());
println!(" - Ready CMD {:X} ISR {:X} IMR {:X} PHYS {:X} RMS {:X} MTPS {:X} RCR {:X} TCR {:X} RDSAR {:X} TNPDS {:X} THPDS {:X}",
self.regs.cmd.read(),
self.regs.isr.read(),
self.regs.imr.read(),
self.regs.phys_sts.read(),
self.regs.rms.read(),
self.regs.mtps.read(),
self.regs.rcr.read(),
self.regs.tcr.read(),
self.regs.rdsar[0].read(),
self.regs.tnpds[0].read(),
self.regs.thpds[0].read());
}
}
......@@ -36,6 +36,8 @@ fn main() {
let socket_fd = syscall::open(":network", syscall::O_RDWR | syscall::O_CREAT | syscall::O_NONBLOCK).expect("rtl8168d: failed to create network scheme");
let socket = Arc::new(RefCell::new(unsafe { File::from_raw_fd(socket_fd) }));
let mut irq_file = File::open(format!("irq:{}", irq)).expect("rtl8168d: failed to open IRQ file");
let address = unsafe { syscall::physmap(bar, 256, MAP_WRITE).expect("rtl8168d: failed to map address") };
{
let device = Arc::new(RefCell::new(unsafe { device::Rtl8168::new(address, irq).expect("rtl8168d: failed to allocate device") }));
......@@ -47,7 +49,6 @@ fn main() {
let device_irq = device.clone();
let socket_irq = socket.clone();
let todo_irq = todo.clone();
let mut irq_file = File::open(format!("irq:{}", irq)).expect("rtl8168d: failed to open IRQ file");
event_queue.add(irq_file.as_raw_fd(), move |_count: usize| -> Result<Option<()>> {
let mut irq = [0; 8];
irq_file.read(&mut irq)?;
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment