From 232f6e9ade89cfb3c7b07259b4a42352a024c516 Mon Sep 17 00:00:00 2001
From: 4lDO2 <4lDO2@protonmail.com>
Date: Fri, 19 Jul 2024 18:44:21 +0200
Subject: [PATCH] Fix hardcoding of SUPPORTS_AVX.
---
redox-rt/src/arch/x86_64.rs | 2 +-
redox-rt/src/signal.rs | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/redox-rt/src/arch/x86_64.rs b/redox-rt/src/arch/x86_64.rs
index 541fc1bf..07af5254 100644
--- a/redox-rt/src/arch/x86_64.rs
+++ b/redox-rt/src/arch/x86_64.rs
@@ -428,7 +428,7 @@ pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) {
}
}
-static SUPPORTS_AVX: AtomicU8 = AtomicU8::new(1); // FIXME
+pub(crate) static SUPPORTS_AVX: AtomicU8 = AtomicU8::new(0);
// __relibc will be prepended to the name, so mangling is fine
#[no_mangle]
diff --git a/redox-rt/src/signal.rs b/redox-rt/src/signal.rs
index 0aac7edc..b07bda6b 100644
--- a/redox-rt/src/signal.rs
+++ b/redox-rt/src/signal.rs
@@ -491,6 +491,7 @@ pub fn setup_sighandler(tcb: &RtTcb) {
{
let cpuid_eax1_ecx = unsafe { core::arch::x86_64::__cpuid(1) }.ecx;
CPUID_EAX1_ECX.store(cpuid_eax1_ecx, core::sync::atomic::Ordering::Relaxed);
+ SUPPORTS_AVX.store(u8::from(cpuid_eax1_ecx & 1 << 28 != 0), Ordering::Relaxed);
}
let data = current_setsighandler_struct();
--
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