From 9bb34901bfcc47d3e47b3a7233aba94e9baa2f3b Mon Sep 17 00:00:00 2001
From: 4lDO2 <4lDO2@protonmail.com>
Date: Thu, 27 Jun 2024 11:16:01 +0200
Subject: [PATCH] Adjust trampolines, only ip and 'archdep' regs are saved.
---
redox-rt/src/arch/i686.rs | 24 ++++++++++++++----------
redox-rt/src/arch/x86_64.rs | 31 ++++++++++++++++++++-----------
2 files changed, 34 insertions(+), 21 deletions(-)
diff --git a/redox-rt/src/arch/i686.rs b/redox-rt/src/arch/i686.rs
index 337eb6a5..d2912ae8 100644
--- a/redox-rt/src/arch/i686.rs
+++ b/redox-rt/src/arch/i686.rs
@@ -99,6 +99,10 @@ asmfunction!(__relibc_internal_fork_ret: ["
ret
"] <= [child_hook = sym child_hook]);
asmfunction!(__relibc_internal_sigentry: ["
+ mov gs:[{tcb_sa_off} + {sa_tmp_esp}], esp
+ mov gs:[{tcb_sa_off} + {sa_tmp_eax}], eax
+ mov gs:[{tcb_sa_off} + {sa_tmp_edx}], edx
+
// Read pending half of first signal. This can be done nonatomically wrt the mask bits, since
// only this thread is allowed to modify the latter.
@@ -135,15 +139,15 @@ asmfunction!(__relibc_internal_sigentry: ["
.byte 0x66, 0x6a, 0x00 // pushw 0
push ss
.byte 0x66, 0x6a, 0x00 // pushw 0
- push dword ptr gs:[{tcb_sc_off} + {sc_saved_esp}]
+ push dword ptr gs:[{tcb_sa_off} + {sc_tmp_esp}]
push dword ptr gs:[{tcb_sc_off} + {sc_saved_eflags}]
push cs
.byte 0x66, 0x6a, 0x00 // pushw 0
push dword ptr gs:[{tcb_sc_off} + {sc_saved_eip}]
- push dword ptr gs:[{tcb_sc_off} + {sc_saved_edx}]
+ push dword ptr gs:[{tcb_sa_off} + {sc_tmp_edx}]
push ecx
- push dword ptr gs:[{tcb_sc_off} + {sc_saved_eax}]
+ push dword ptr gs:[{tcb_sa_off} + {sc_tmp_eax}]
push ebx
push edi
push esi
@@ -167,24 +171,24 @@ asmfunction!(__relibc_internal_sigentry: ["
pop ecx
pop edx
- pop dword ptr gs:[{tcb_sa_off} + {sa_tmp}]
+ pop dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
add esp, 4
popfd
pop esp
- jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp}]
+ jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
7:
ud2
"] <= [
inner = sym inner_fastcall,
- sa_tmp = const offset_of!(SigArea, tmp),
+ sa_tmp_eip = const offset_of!(SigArea, tmp_eip),
+ sa_tmp_esp = const offset_of!(SigArea, tmp_esp),
+ sa_tmp_eax = const offset_of!(SigArea, tmp_eax),
+ sa_tmp_edx = const offset_of!(SigArea, tmp_edx),
sa_altstack_top = const offset_of!(SigArea, altstack_top),
sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
sa_onstack = const offset_of!(SigArea, onstack),
- sc_saved_eax = const offset_of!(Sigcontrol, saved_scratch_a),
- sc_saved_edx = const offset_of!(Sigcontrol, saved_scratch_b),
- sc_saved_eflags = const offset_of!(Sigcontrol, saved_flags),
+ sc_saved_eflags = const offset_of!(Sigcontrol, saved_archdep_reg),
sc_saved_eip = const offset_of!(Sigcontrol, saved_ip),
- sc_saved_esp = const offset_of!(Sigcontrol, saved_sp),
sc_word = const offset_of!(Sigcontrol, word),
tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
diff --git a/redox-rt/src/arch/x86_64.rs b/redox-rt/src/arch/x86_64.rs
index cf6b2dcb..13bfc526 100644
--- a/redox-rt/src/arch/x86_64.rs
+++ b/redox-rt/src/arch/x86_64.rs
@@ -14,9 +14,13 @@ pub(crate) const STACK_SIZE: usize = 1024 * 1024;
#[derive(Debug, Default)]
pub struct SigArea {
+ pub tmp_rip: usize,
+ pub tmp_rsp: usize,
+ pub tmp_rax: usize,
+ pub tmp_rdx: usize,
+
pub altstack_top: usize,
pub altstack_bottom: usize,
- pub tmp: usize,
pub onstack: u64,
pub disable_signals_depth: u64,
}
@@ -130,6 +134,11 @@ asmfunction!(__relibc_internal_rlct_clone_ret: ["
"] <= []);
asmfunction!(__relibc_internal_sigentry: ["
+ // Save some registers
+ mov fs:[{tcb_sa_off} + {sa_tmp_rsp}], rsp
+ mov fs:[{tcb_sa_off} + {sa_tmp_rax}], rax
+ mov fs:[{tcb_sa_off} + {sa_tmp_rdx}], rdx
+
// First, select signal, always pick first available bit
// Read first signal word
@@ -177,16 +186,16 @@ asmfunction!(__relibc_internal_sigentry: ["
// Now that we have a stack, we can finally start initializing the signal stack!
push 0x23 // SS
- push fs:[{tcb_sc_off} + {sc_saved_rsp}]
+ push fs:[{tcb_sa_off} + {sa_tmp_rsp}]
push fs:[{tcb_sc_off} + {sc_saved_rflags}]
push 0x2b // CS
push fs:[{tcb_sc_off} + {sc_saved_rip}]
push rdi
push rsi
- push fs:[{tcb_sc_off} + {sc_saved_rdx}]
+ push fs:[{tcb_sa_off} + {sa_tmp_rdx}]
push rcx
- push fs:[{tcb_sc_off} + {sc_saved_rax}]
+ push fs:[{tcb_sa_off} + {sa_tmp_rax}]
push r8
push r9
push r10
@@ -243,11 +252,11 @@ asmfunction!(__relibc_internal_sigentry: ["
iretq
/*
- pop qword ptr fs:[{tcb_sa_off} + {sa_tmp}]
+ pop qword ptr fs:[{tcb_sa_off} + {sa_tmp_rip}]
add rsp, 8
popfq
pop rsp
- jmp qword ptr fs:[{tcb_sa_off} + {sa_tmp}]
+ jmp qword ptr fs:[{tcb_sa_off} + {sa_tmp_rip}]
*/
6:
fxsave64 [rsp]
@@ -262,15 +271,15 @@ asmfunction!(__relibc_internal_sigentry: ["
// Spurious signal
"] <= [
inner = sym inner_c,
- sa_tmp = const offset_of!(SigArea, tmp),
+ sa_tmp_rip = const offset_of!(SigArea, tmp_rip),
+ sa_tmp_rsp = const offset_of!(SigArea, tmp_rsp),
+ sa_tmp_rax = const offset_of!(SigArea, tmp_rax),
+ sa_tmp_rdx = const offset_of!(SigArea, tmp_rdx),
sa_altstack_top = const offset_of!(SigArea, altstack_top),
sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
sa_onstack = const offset_of!(SigArea, onstack),
- sc_saved_rax = const offset_of!(Sigcontrol, saved_scratch_a),
- sc_saved_rdx = const offset_of!(Sigcontrol, saved_scratch_b),
- sc_saved_rflags = const offset_of!(Sigcontrol, saved_flags),
+ sc_saved_rflags = const offset_of!(Sigcontrol, saved_archdep_reg),
sc_saved_rip = const offset_of!(Sigcontrol, saved_ip),
- sc_saved_rsp = const offset_of!(Sigcontrol, saved_sp),
sc_word = const offset_of!(Sigcontrol, word),
tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
--
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