Skip to content
  • Jim Wilson's avatar
    RISC-V: Add RV32E support. · 7f999549
    Jim Wilson authored
    	Kito Cheng  <kito.cheng@gmail.com>
    	Monk Chiang  <sh.chiang04@gmail.com>
    
    	bfd/
    	* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Handle
    	EF_RISCV_RVE.
    
    	binutils/
    	* readelf.c (get_machine_flags): Handle EF_RISCV_RVE.
    
    	gas/
    	* config/tc-riscv.c (rve_abi): New.
    	(riscv_set_options): Add rve field.  Initialize it.
    	(riscv_set_rve) New function.
    	(riscv_set_arch): Support 'e' ISA subset.
    	(reg_lookup_internal): If rve, check register is available.
    	(riscv_set_abi): New parameter rve.
    	(md_parse_option): Pass new argument to riscv_set_abi.
    	(riscv_after_parse_args): Call riscv_set_rve.  If rve_abi, set
    	EF_RISCV_RVE.
    	* doc/c-riscv.texi (-mabi): Document new ilp32e argument.
    
    	include/
    	* elf/riscv.h (EF_RISCV_RVE): New define.
    7f999549
To find the state of this project's repository at the time of any of these versions, check out the tags.