Commit 2f1bada2 authored by Jan Beulich's avatar Jan Beulich Committed by Jan Beulich

x86: drop VexImmExt

It's only used in assertions, and hence not really needed for correct
code generation.
parent dcd7e323
2018-04-26 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Drop .veximmext uses.
Move part of the remaining assertion.
2018-04-26 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (build_modrm_byte): Extend assertion in
......
......@@ -6573,9 +6573,6 @@ build_modrm_byte (void)
unsigned int nds, reg_slot;
expressionS *exp;
gas_assert (!i.tm.opcode_modifier.veximmext
|| !i.tm.opcode_modifier.immext);
dest = i.operands - 1;
nds = dest - 1;
......@@ -6585,13 +6582,10 @@ build_modrm_byte (void)
VexW0 or VexW1. The destination must be either XMM, YMM or
ZMM register.
2. 4 operands: 4 register operands or 3 register operands
plus 1 memory operand, VexXDS, and VexImmExt */
plus 1 memory operand, with VexXDS. */
gas_assert ((i.reg_operands == 4
|| (i.reg_operands == 3 && i.mem_operands == 1))
&& i.tm.opcode_modifier.vexvvvv == VEXXDS
&& (i.tm.opcode_modifier.veximmext
|| (i.imm_operands == 1
&& i.types[0].bitfield.vec_imm4))
&& i.tm.opcode_modifier.vexw
&& i.tm.operand_types[dest].bitfield.regsimd);
......@@ -6625,6 +6619,8 @@ build_modrm_byte (void)
{
unsigned int imm_slot;
gas_assert (i.imm_operands == 1 && i.types[0].bitfield.vec_imm4);
if (i.tm.opcode_modifier.vexw == VEXW0)
{
/* If VexW0 is set, the third operand is the source and
......
2018-04-26 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (VexImmExt): Delete.
* i386-opc.h (VexImmExt, veximmext): Delete.
* i386-opc.tbl: Drop all VexImmExt uses.
* i386-tlb.h: Re-generate.
2018-04-25 Jan Beulich <jbeulich@suse.com>
* i386-opc.tbl (vpslld, vpsrad, vpsrld): Drop AVX512VL
......
......@@ -638,7 +638,6 @@ static bitfield opcode_modifiers[] =
BITFIELD (VexW),
BITFIELD (VexOpcode),
BITFIELD (VexSources),
BITFIELD (VexImmExt),
BITFIELD (VecSIB),
BITFIELD (SSE2AVX),
BITFIELD (NoAVX),
......
......@@ -532,8 +532,6 @@ enum
#define XOP2SOURCES 1
#define VEX3SOURCES 2
VexSources,
/* instruction has VEX 8 bit imm */
VexImmExt,
/* Instruction with vector SIB byte:
1: 128bit vector register.
2: 256bit vector register.
......@@ -655,7 +653,6 @@ typedef struct i386_opcode_modifier
unsigned int vexw:2;
unsigned int vexopcode:3;
unsigned int vexsources:2;
unsigned int veximmext:1;
unsigned int vecsib:2;
unsigned int sse2avx:1;
unsigned int noavx:1;
......
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