Commit 71060565 authored by Jim Wilson's avatar Jim Wilson

RISC-V: Add new option -mrelax/-mno-relax.

	gas/
	* config/tc-riscv.c (options): Add OPTION_RELAX and
	OPTION_NO_RELAX.
	(md_longopts): New option -mrelax and -mno-relax.
	(md_parse_option): Handle -mrelax and -mno-relax.
	* doc/c-riscv.texi: Document for -mrelax and -mno-relax.
	* testsuite/gas/riscv/no-relax-reloc.d: New.
	* testsuite/gas/riscv/no-relax-reloc.s: New.
	* testsuite/gas/riscv/relax-reloc.d: New.
	* testsuite/gas/riscv/relax-reloc.s: New.
parent 5c8f23cd
2018-04-20 Kito Cheng <kito.cheng@gmail.com>
* config/tc-riscv.c (options): Add OPTION_RELAX and
OPTION_NO_RELAX.
(md_longopts): New option -mrelax and -mno-relax.
(md_parse_option): Handle -mrelax and -mno-relax.
* doc/c-riscv.texi: Document for -mrelax and -mno-relax.
* testsuite/gas/riscv/no-relax-reloc.d: New.
* testsuite/gas/riscv/no-relax-reloc.s: New.
* testsuite/gas/riscv/relax-reloc.d: New.
* testsuite/gas/riscv/relax-reloc.s: New.
2018-04-20 Nick Clifton <nickc@redhat.com>
* po/es.po: Updated Spanish translation.
......
......@@ -2136,6 +2136,8 @@ enum options
OPTION_PIC,
OPTION_NO_PIC,
OPTION_MABI,
OPTION_RELAX,
OPTION_NO_RELAX,
OPTION_END_OF_ENUM
};
......@@ -2146,6 +2148,8 @@ struct option md_longopts[] =
{"fpic", no_argument, NULL, OPTION_PIC},
{"fno-pic", no_argument, NULL, OPTION_NO_PIC},
{"mabi", required_argument, NULL, OPTION_MABI},
{"mrelax", no_argument, NULL, OPTION_RELAX},
{"mno-relax", no_argument, NULL, OPTION_NO_RELAX},
{NULL, no_argument, NULL, 0}
};
......@@ -2205,6 +2209,14 @@ md_parse_option (int c, const char *arg)
return 0;
break;
case OPTION_RELAX:
riscv_opts.relax = TRUE;
break;
case OPTION_NO_RELAX:
riscv_opts.relax = FALSE;
break;
default:
return 0;
}
......@@ -2921,6 +2933,8 @@ RISC-V options:\n\
-fno-pic don't generate position-independent code (default)\n\
-march=ISA set the RISC-V architecture\n\
-mabi=ABI set the RISC-V ABI\n\
-mrelax enable relax (default)\n\
-mno-relax disable relax\n\
"));
}
......
......@@ -48,6 +48,15 @@ by "f", "d", or "q" to indicate single-precision, double-precision, or
quad-precision floating-point calling convention, or none to indicate
the soft-float calling convention.
@cindex @samp{-mrelax} option, RISC-V
@item -mrelax
Take advantage of linker relaxations to reduce the number of instructions
required to materialize symbol addresses. (default)
@cindex @samp{-mno-relax} option, RISC-V
@item -mno-relax
Don't do linker relaxations.
@end table
@c man end
......
#as: -mno-relax
#objdump: -r
.*:[ ]+file format .*
RELOCATION RECORDS FOR .*
.*
0+0 R_RISCV_HI20.*
0+4 R_RISCV_LO12_I.*
0+8 R_RISCV_PCREL_HI20.*
0+c R_RISCV_PCREL_LO12_I.*
0+10 R_RISCV_CALL.*
target:
lui a5,%hi(target)
lw a5,%lo(target)(a5)
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
call target
#as:
#objdump: -r
.*:[ ]+file format .*
RELOCATION RECORDS FOR .*
.*
0+0 R_RISCV_HI20.*
0+0 R_RISCV_RELAX.*
0+4 R_RISCV_LO12_I.*
0+4 R_RISCV_RELAX.*
0+8 R_RISCV_PCREL_HI20.*
0+8 R_RISCV_RELAX.*
0+c R_RISCV_PCREL_LO12_I.*
0+c R_RISCV_RELAX.*
0+10 R_RISCV_CALL.*
0+10 R_RISCV_RELAX.*
target:
lui a5,%hi(target)
lw a5,%lo(target)(a5)
.LA0: auipc a5,%pcrel_hi(bar)
lw a0,%pcrel_lo(.LA0)(a5)
call target
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