Commit 929f69fa authored by Jan Beulich's avatar Jan Beulich Committed by Jan Beulich

x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()

Just like for the AVX/AES and AVX/PCLMUL combinations, AVX/GFN,
AVX512F/GFNI, AVX512F/VAES, and AVX512F/PCLMUL need special handling to
deal with the pair of required checks specified in the templates.
parent ab592e75
2018-03-08 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (cpu_flags_match): Add GFNI check to AVX
logic. Add respective logic for AVX512F.
* testsuite/gas/i386/arch-avx-1.s: Add GFNI test.
testsuite/gas/i386/arch-avx-1.d,
testsuite/gas/i386/arch-avx-1-1.l,
testsuite/gas/i386/arch-avx-1-2.l,
testsuite/gas/i386/arch-avx-1-3.l,
testsuite/gas/i386/arch-avx-1-4.l,
testsuite/gas/i386/arch-avx-1-5.l,
testsuite/gas/i386/arch-avx-1-6.l: Adjust expectations.
* testsuite/gas/i386/arch-avx-1-7.l,
testsuite/gas/i386/arch-avx-1-7.s,
testsuite/gas/i386/arch-avx-1-8.l,
testsuite/gas/i386/arch-avx-1-8.s,
testsuite/gas/i386/avx512f-plain.l,
testsuite/gas/i386/avx512f-plain.s,
testsuite/gas/i386/avx512vl-plain.l,
testsuite/gas/i386/avx512vl-plain.s: New.
* testsuite/gas/i386/i386.exp: Run new tests.
2018-03-08 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (cpu_flags_match): Move AVX512VL check ahead.
......
......@@ -1722,13 +1722,23 @@ cpu_flags_match (const insn_template *t)
{
if (x.bitfield.cpuavx)
{
/* We only need to check AES/PCLMUL/SSE2AVX with AVX. */
/* We need to check a few extra flags with AVX. */
if (cpu.bitfield.cpuavx
&& (!t->opcode_modifier.sse2avx || sse2avx)
&& (!x.bitfield.cpuaes || cpu.bitfield.cpuaes)
&& (!x.bitfield.cpugfni || cpu.bitfield.cpugfni)
&& (!x.bitfield.cpupclmul || cpu.bitfield.cpupclmul))
match |= CPU_FLAGS_ARCH_MATCH;
}
else if (x.bitfield.cpuavx512f)
{
/* We need to check a few extra flags with AVX512F. */
if (cpu.bitfield.cpuavx512f
&& (!x.bitfield.cpugfni || cpu.bitfield.cpugfni)
&& (!x.bitfield.cpuvaes || cpu.bitfield.cpuvaes)
&& (!x.bitfield.cpuvpclmulqdq || cpu.bitfield.cpuvpclmulqdq))
match |= CPU_FLAGS_ARCH_MATCH;
}
else
match |= CPU_FLAGS_ARCH_MATCH;
}
......
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*4[ ]+11
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+\?\?\?\? C4E34944 vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*6[ ]+D408
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
......@@ -11,3 +12,5 @@ GAS LISTING .*
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
.*:8: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.include "arch-avx-1\.s"
[ ]*1[ ]+\# Test -march=
[ ]*2[ ]+\.text
[ ]*3[ ]+\# AES \+ AVX
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:4: Error: .*
.*:6: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.include "arch-avx-1\.s"
[ ]*1[ ]+\# Test -march=
[ ]*2[ ]+\.text
[ ]*3[ ]+\# AES \+ AVX
[ ]*4[ ]+vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*5[ ]+\# PCLMUL \+ AVX
[ ]*6[ ]+vpclmulqdq \$8,%xmm4,%xmm6,%xmm2
[ ]*7[ ]+# GFNI \+ AVX
[ ]*8[ ]+\?\?\?\? C4E269CF vgf2p8mulb %xmm1,%xmm2,%xmm3
[ ]*8[ ]+D9
#as: -march=generic32+avx+aes+pclmul
#as: -march=generic32+avx+aes+pclmul+gfni
#objdump: -dw
#name: i386 arch avx 1
......@@ -9,4 +9,5 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: c4 e2 79 dc 11 vaesenc \(%ecx\),%xmm0,%xmm2
[ ]*[a-f0-9]+: c4 e3 49 44 d4 08 vpclmulqdq \$0x8,%xmm4,%xmm6,%xmm2
[ ]*[a-f0-9]+: c4 e2 69 cf d9 vgf2p8mulb %xmm1,%xmm2,%xmm3
#pass
......@@ -4,3 +4,5 @@
vaesenc (%ecx),%xmm0,%xmm2
# PCLMUL + AVX
vpclmulqdq $8,%xmm4,%xmm6,%xmm2
# GFNI + AVX
vgf2p8mulb %xmm1,%xmm2,%xmm3
.*: Assembler messages:
.*:5: Error: .*
.*:6: Error: .*
.*:7: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.text
[ ]*2[ ]+\.arch generic32
[ ]*3[ ]+\.arch \.avx512f
[ ]*4[ ]+_start:
[ ]*5[ ]+vaesenc[ ]+%zmm1, %zmm2, %zmm3
[ ]*6[ ]+vgf2p8mulb[ ]+%zmm1, %zmm2, %zmm3
[ ]*7[ ]+vpclmulqdq[ ]+\$0, %zmm1, %zmm2, %zmm3
[ ]*8[ ]*
[ ]*9[ ]+\.arch \.vaes
[ ]*10[ ]+\?\?\?\? 62F26D48[ ]+vaesenc[ ]+%zmm1, %zmm2, %zmm3
[ ]*10[ ]+DCD9
[ ]*11[ ]*
[ ]*12[ ]+\.arch \.gfni
[ ]*13[ ]+\?\?\?\? 62F26D48[ ]+vgf2p8mulb[ ]+%zmm1, %zmm2, %zmm3
[ ]*13[ ]+CFD9
[ ]*14[ ]*
[ ]*15[ ]+\.arch \.vpclmulqdq
[ ]*16[ ]+\?\?\?\? 62F36D48[ ]+vpclmulqdq[ ]+\$0, %zmm1, %zmm2, %zmm3
[ ]*16[ ]+44D900
.text
.arch generic32
.arch .avx512f
_start:
vaesenc %zmm1, %zmm2, %zmm3
vgf2p8mulb %zmm1, %zmm2, %zmm3
vpclmulqdq $0, %zmm1, %zmm2, %zmm3
.arch .vaes
vaesenc %zmm1, %zmm2, %zmm3
.arch .gfni
vgf2p8mulb %zmm1, %zmm2, %zmm3
.arch .vpclmulqdq
vpclmulqdq $0, %zmm1, %zmm2, %zmm3
.*: Assembler messages:
.*:5: Error: .*
.*:6: Error: .*
.*:7: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.text
[ ]*2[ ]+\.arch generic32
[ ]*3[ ]+\.arch \.avx512vl
[ ]*4[ ]+_start:
[ ]*5[ ]+\{evex\} vaesenc[ ]+%ymm1, %ymm2, %ymm3
[ ]*6[ ]+vgf2p8mulb[ ]+%ymm1, %ymm2, %ymm3\{%k4\}
[ ]*7[ ]+\{evex\} vpclmulqdq[ ]+\$0, %ymm1, %ymm2, %ymm3
[ ]*8[ ]*
[ ]*9[ ]+\.arch \.vaes
[ ]*10[ ]+\?\?\?\? 62F26D28[ ]+\{evex\} vaesenc[ ]+%ymm1, %ymm2, %ymm3
[ ]*10[ ]+DCD9
[ ]*11[ ]*
[ ]*12[ ]+\.arch \.gfni
[ ]*13[ ]+\?\?\?\? 62F26D2C[ ]+vgf2p8mulb[ ]+%ymm1, %ymm2, %ymm3\{%k4\}
[ ]*13[ ]+CFD9
[ ]*14[ ]*
[ ]*15[ ]+\.arch \.vpclmulqdq
[ ]*16[ ]+\?\?\?\? 62F36D28[ ]+\{evex\} vpclmulqdq[ ]+\$0, %ymm1, %ymm2, %ymm3
[ ]*16[ ]+44D900
.text
.arch generic32
.arch .avx512vl
_start:
{evex} vaesenc %ymm1, %ymm2, %ymm3
vgf2p8mulb %ymm1, %ymm2, %ymm3{%k4}
{evex} vpclmulqdq $0, %ymm1, %ymm2, %ymm3
.arch .vaes
{evex} vaesenc %ymm1, %ymm2, %ymm3
.arch .gfni
vgf2p8mulb %ymm1, %ymm2, %ymm3{%k4}
.arch .vpclmulqdq
{evex} vpclmulqdq $0, %ymm1, %ymm2, %ymm3
......@@ -206,6 +206,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "avx512f-opts"
run_dump_test "avx512f-opts-intel"
run_dump_test "avx512f-nondef"
run_list_test "avx512f-plain" "-al"
run_dump_test "avx512cd"
run_dump_test "avx512cd-intel"
run_dump_test "avx512er"
......@@ -246,6 +247,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_list_test "arch-avx-1-4" "-march=generic32+avx+aes -I${srcdir}/$subdir -al"
run_list_test "arch-avx-1-5" "-march=generic32+avx+pclmul -I${srcdir}/$subdir -al"
run_list_test "arch-avx-1-6" "-march=generic32+aes+pclmul -I${srcdir}/$subdir -al"
run_list_test "arch-avx-1-7" "-march=generic32+gfni -I${srcdir}/$subdir -al"
run_list_test "arch-avx-1-8" "-march=generic32+avx+gfni -I${srcdir}/$subdir -al"
run_dump_test "opts"
run_dump_test "opts-intel"
run_dump_test "sse2avx-opts"
......@@ -421,6 +424,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "pconfig-intel"
run_list_test "avx512vl-1" "-al"
run_list_test "avx512vl-2" "-al"
run_list_test "avx512vl-plain" "-al"
run_dump_test "fpu-bad"
run_dump_test "cet"
run_dump_test "cet-intel"
......
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