Commit de89d0a3 authored by Igor Tsimbalist's avatar Igor Tsimbalist

Enable Intel WAITPKG instructions.

Intel has disclosed a set of new instructions for Tremont processor.
The spec is
https://software.intel.com/en-us/intel-architecture-instruction-set-extensions-programming-reference
This patch enables Intel WAITPKG instructions.

gas/
	* config/tc-i386.c (cpu_arch): Add WAITPKG.
	(cpu_noarch): Likewise.
	* doc/c-i386.texi: Document WAITPKG.
	* i386/i386.exp: Run WAITPKG tests.
	* testsuite/gas/i386/waitpkg-intel.d: New test.
	* testsuite/gas/i386/waitpkg.d: Likewise.
	* testsuite/gas/i386/waitpkg.s: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg-intel.d: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.
	* testsuite/gas/i386/x86-64-waitpkg.s: Likewise.

opcodes/
	* i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
	PREFIX_MOD_1_0FAE_REG_6.
	(va_mode): New.
	(OP_E_register): Use va_mode.
	* i386-dis-evex.h (prefix_table):
	New instructions (see prefixes above).
	* i386-gen.c (cpu_flag_init): Add WAITPKG.
	(cpu_flags): Likewise.
	* i386-opc.h (enum): Likewise.
	(i386_cpu_flags): Likewise.
	* i386-opc.tbl: Add umonitor, umwait, tpause.
	* i386-init.h: Regenerate.
	* i386-tbl.h: Likewise.
parent 6295b6da
2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* config/tc-i386.c (cpu_arch): Add WAITPKG.
(cpu_noarch): Likewise.
* doc/c-i386.texi: Document WAITPKG.
* i386/i386.exp: Run WAITPKG tests.
* testsuite/gas/i386/waitpkg-intel.d: New test.
* testsuite/gas/i386/waitpkg.d: Likewise.
* testsuite/gas/i386/waitpkg.s: Likewise.
* testsuite/gas/i386/x86-64-waitpkg-intel.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.d: Likewise.
* testsuite/gas/i386/x86-64-waitpkg.s: Likewise.
2018-04-11 Alan Modra <amodra@gmail.com>
* config/aout_gnu.h: Delete.
......
......@@ -1026,6 +1026,8 @@ static const arch_entry cpu_arch[] =
CPU_WBNOINVD_FLAGS, 0 },
{ STRING_COMMA_LEN (".pconfig"), PROCESSOR_UNKNOWN,
CPU_PCONFIG_FLAGS, 0 },
{ STRING_COMMA_LEN (".waitpkg"), PROCESSOR_UNKNOWN,
CPU_WAITPKG_FLAGS, 0 },
};
static const noarch_entry cpu_noarch[] =
......
......@@ -231,6 +231,7 @@ accept various extension mnemonics. For example,
@code{clzero},
@code{wbnoinvd},
@code{pconfig},
@code{waitpkg},
@code{lwp},
@code{fma4},
@code{xop},
......@@ -1272,7 +1273,7 @@ supported on the CPU specified. The choices for @var{cpu_type} are:
@item @samp{.avx512_vpopcntdq} @tab @samp{.avx512_vbmi2} @tab @samp{.avx512_vnni}
@item @samp{.avx512_bitalg}
@item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
@item @samp{.wbnoinvd} @tab @samp{.pconfig}
@item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg}
@item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
@item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
@item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme} @tab @samp{.abm}
......
......@@ -422,6 +422,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "wbnoinvd-intel"
run_dump_test "pconfig"
run_dump_test "pconfig-intel"
run_dump_test "waitpkg"
run_dump_test "waitpkg-intel"
run_list_test "avx512vl-1" "-al"
run_list_test "avx512vl-2" "-al"
run_list_test "avx512vl-plain" "-al"
......@@ -910,6 +912,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-wbnoinvd-intel"
run_dump_test "x86-64-pconfig"
run_dump_test "x86-64-pconfig-intel"
run_dump_test "x86-64-waitpkg"
run_dump_test "x86-64-waitpkg-intel"
run_dump_test "x86-64-fence-as-lock-add-yes"
run_dump_test "x86-64-fence-as-lock-add-no"
run_dump_test "x86-64-pr20141"
......
#as:
#objdump: -dw -Mintel
#name: i386 WAITPKG insns (Intel disassembly)
#source: waitpkg.s
.*: +file format .*
Disassembly of section \.text:
00000000 <_start>:
[ ]*[a-f0-9]+:[ ]*f3 0f ae f0[ ]*umonitor eax
[ ]*[a-f0-9]+:[ ]*67 f3 0f ae f1[ ]*umonitor cx
[ ]*[a-f0-9]+:[ ]*f2 0f ae f1[ ]*umwait ecx
[ ]*[a-f0-9]+:[ ]*66 0f ae f1[ ]*tpause ecx
#pass
#as:
#objdump: -dw
#name: i386 WAITPKG insns
#source: waitpkg.s
.*: +file format .*
Disassembly of section \.text:
00000000 <_start>:
[ ]*[a-f0-9]+:[ ]*f3 0f ae f0[ ]*umonitor %eax
[ ]*[a-f0-9]+:[ ]*67 f3 0f ae f1[ ]*umonitor %cx
[ ]*[a-f0-9]+:[ ]*f2 0f ae f1[ ]*umwait %ecx
[ ]*[a-f0-9]+:[ ]*66 0f ae f1[ ]*tpause %ecx
#pass
# Check 32bit WAITPKG instructions.
.text
_start:
umonitor %eax
umonitor %cx
umwait %ecx
tpause %ecx
#as:
#objdump: -dw -Mintel
#name: x86_64 WAITPKG insns (Intel disassembly)
#source: x86-64-waitpkg.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*f3 0f ae f0[ ]*umonitor rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f ae f2[ ]*umonitor r10
[ ]*[a-f0-9]+:[ ]*67 f3 41 0f ae f2[ ]*umonitor r10d
[ ]*[a-f0-9]+:[ ]*f2 0f ae f1[ ]*umwait rcx
[ ]*[a-f0-9]+:[ ]*f2 41 0f ae f2[ ]*umwait r10
[ ]*[a-f0-9]+:[ ]*66 0f ae f1[ ]*tpause rcx
[ ]*[a-f0-9]+:[ ]*66 41 0f ae f2[ ]*tpause r10
#pass
#as:
#objdump: -dw
#name: x86_64 WAITPKG insns
#source: x86-64-waitpkg.s
.*: +file format .*
Disassembly of section \.text:
0+ <_start>:
[ ]*[a-f0-9]+:[ ]*f3 0f ae f0[ ]*umonitor %rax
[ ]*[a-f0-9]+:[ ]*f3 41 0f ae f2[ ]*umonitor %r10
[ ]*[a-f0-9]+:[ ]*67 f3 41 0f ae f2[ ]*umonitor %r10d
[ ]*[a-f0-9]+:[ ]*f2 0f ae f1[ ]*umwait %rcx
[ ]*[a-f0-9]+:[ ]*f2 41 0f ae f2[ ]*umwait %r10
[ ]*[a-f0-9]+:[ ]*66 0f ae f1[ ]*tpause %rcx
[ ]*[a-f0-9]+:[ ]*66 41 0f ae f2[ ]*tpause %r10
#pass
# Check 64bit WAITPKG instructions.
.text
_start:
umonitor %rax
umonitor %r10
umonitor %r10d
umwait %rcx
umwait %r10
tpause %rcx
tpause %r10
2018-04-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
* i386-dis.c (enum): Add PREFIX_MOD_0_0FAE_REG_6,
PREFIX_MOD_1_0FAE_REG_6.
(va_mode): New.
(OP_E_register): Use va_mode.
* i386-dis-evex.h (prefix_table):
New instructions (see prefixes above).
* i386-gen.c (cpu_flag_init): Add WAITPKG.
(cpu_flags): Likewise.
* i386-opc.h (enum): Likewise.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add umonitor, umwait, tpause.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
2018-04-11 Alan Modra <amodra@gmail.com>
* opcodes/i860-dis.c: Delete.
......
......@@ -250,6 +250,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EbS { OP_E, b_swap_mode }
#define EbndS { OP_E, bnd_swap_mode }
#define Ev { OP_E, v_mode }
#define Eva { OP_E, va_mode }
#define Ev_bnd { OP_E, v_bnd_mode }
#define EvS { OP_E, v_swap_mode }
#define Ed { OP_E, d_mode }
......@@ -499,6 +500,8 @@ enum
v_mode,
/* operand size depends on prefixes with operand swapped */
v_swap_mode,
/* operand size depends on address prefix */
va_mode,
/* word operand */
w_mode,
/* double word operand */
......@@ -1008,7 +1011,8 @@ enum
PREFIX_MOD_3_0FAE_REG_4,
PREFIX_MOD_0_0FAE_REG_5,
PREFIX_MOD_3_0FAE_REG_5,
PREFIX_0FAE_REG_6,
PREFIX_MOD_0_0FAE_REG_6,
PREFIX_MOD_1_0FAE_REG_6,
PREFIX_0FAE_REG_7,
PREFIX_0FB8,
PREFIX_0FBC,
......@@ -4191,13 +4195,21 @@ static const struct dis386 prefix_table[][4] = {
{ "incsspK", { Rdq }, PREFIX_OPCODE },
},
/* PREFIX_0FAE_REG_6 */
/* PREFIX_MOD_0_0FAE_REG_6 */
{
{ "xsaveopt", { FXSAVE }, PREFIX_OPCODE },
{ "clrssbsy", { Mq }, PREFIX_OPCODE },
{ "clwb", { Mb }, PREFIX_OPCODE },
},
/* PREFIX_MOD_1_0FAE_REG_6 */
{
{ RM_TABLE (RM_0FAE_REG_6) },
{ "umonitor", { Eva }, PREFIX_OPCODE },
{ "tpause", { Em }, PREFIX_OPCODE },
{ "umwait", { Em }, PREFIX_OPCODE },
},
/* PREFIX_0FAE_REG_7 */
{
{ "clflush", { Mb }, 0 },
......@@ -11726,8 +11738,8 @@ static const struct dis386 mod_table[][2] = {
},
{
/* MOD_0FAE_REG_6 */
{ PREFIX_TABLE (PREFIX_0FAE_REG_6) },
{ RM_TABLE (RM_0FAE_REG_6) },
{ PREFIX_TABLE (PREFIX_MOD_0_0FAE_REG_6) },
{ PREFIX_TABLE (PREFIX_MOD_1_0FAE_REG_6) },
},
{
/* MOD_0FAE_REG_7 */
......@@ -15109,6 +15121,21 @@ OP_E_register (int bytemode, int sizeflag)
used_prefixes |= (prefixes & PREFIX_DATA);
}
break;
case va_mode:
names = (address_mode == mode_64bit
? names64 : names32);
if (!(prefixes & PREFIX_ADDR))
names = (address_mode == mode_16bit
? names16 : names);
else
{
/* Remove "addr16/addr32". */
all_prefixes[last_addr_prefix] = 0;
names = (address_mode != mode_32bit
? names32 : names16);
used_prefixes |= PREFIX_ADDR;
}
break;
case mask_bd_mode:
case mask_mode:
if (reg > 0x7)
......
......@@ -283,6 +283,8 @@ static initializer cpu_flag_init[] =
"CpuWBNOINVD" },
{ "CPU_PCONFIG_FLAGS",
"CpuPCONFIG" },
{ "CPU_WAITPKG_FLAGS",
"CpuWAITPKG" },
{ "CPU_ANY_X87_FLAGS",
"CPU_ANY_287_FLAGS|Cpu8087" },
{ "CPU_ANY_287_FLAGS",
......@@ -575,6 +577,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuVPCLMULQDQ),
BITFIELD (CpuWBNOINVD),
BITFIELD (CpuPCONFIG),
BITFIELD (CpuWAITPKG),
BITFIELD (CpuRegMMX),
BITFIELD (CpuRegXMM),
BITFIELD (CpuRegYMM),
......
This diff is collapsed.
......@@ -227,6 +227,8 @@ enum
CpuWBNOINVD,
/* PCONFIG instructions required */
CpuPCONFIG,
/* WAITPKG instructions required */
CpuWAITPKG,
/* MMX register support required */
CpuRegMMX,
/* XMM register support required */
......@@ -358,6 +360,7 @@ typedef union i386_cpu_flags
unsigned int cpuvpclmulqdq:1;
unsigned int cpuwbnoinvd:1;
unsigned int cpupconfig:1;
unsigned int cpuwaitpkg:1;
unsigned int cpuregmmx:1;
unsigned int cpuregxmm:1;
unsigned int cpuregymm:1;
......
......@@ -5898,3 +5898,16 @@ wbnoinvd, 0, 0xf30f09, None, 2, CpuWBNOINVD, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_
pconfig, 0, 0x0f01c5, None, 3, CpuPCONFIG, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { 0 }
// PCONFIG instruction end.
// WAITPKG instructions.
umonitor, 1, 0xf30fae, 0x6, 2, CpuWAITPKG|CpuNo64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOp0, { Reg16|Reg32 }
umonitor, 1, 0xf30fae, 0x6, 2, CpuWAITPKG|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOp0|NoRex64, { Reg32|Reg64 }
tpause, 1, 0x660fae, 0x6, 2, CpuWAITPKG|CpuNo64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32 }
tpause, 1, 0x660fae, 0x6, 2, CpuWAITPKG|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg64 }
umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG|CpuNo64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32 }
umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG|Cpu64, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Reg64 }
// WAITPKG instructions end.
This diff is collapsed.
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