Commit 08196b22 authored by Nick Clifton's avatar Nick Clifton

This patch adds support for the SSBB and PSSBB speculation barrier...

This patch adds support for the SSBB and PSSBB speculation barrier instructions to the AArch64 assembler and disassembler.

For more details see: https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf

opcodes	* aarch64-tbl.h (aarch64_opcode_table): Add entry for
	ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas	* testsuite/gas/aarch64/system.s: Add test for ssbb
	and pssbb.
	* testsuite/gas/aarch64/system.d: Update accordingly
	and remove explicit addresses.
parent 2d73c246
2018-07-12 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/system.s: Add test for ssbb
and pssbb.
* testsuite/gas/aarch64/system.d: Update accordingly
and remove explicit addresses.
2018-07-12 Sudakshina Das <sudi.das@arm.com>
* config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
......
This diff is collapsed.
......@@ -44,6 +44,8 @@
all_barriers op=isb, from=0, to=15
isb
ssbb
pssbb
//
// PREFETCHS
......
2018-07-12 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Add entry for
ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
2018-07-11 Sudakshina Das <sudi.das@arm.com>
* arm-dis.c (arm_opcodes): Add ssbb and pssbb and move
......
......@@ -422,14 +422,14 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1152: /* movz */
value = 1152; /* --> movz. */
break;
case 1192: /* autibsp */
case 1191: /* autibz */
case 1190: /* autiasp */
case 1189: /* autiaz */
case 1188: /* pacibsp */
case 1187: /* pacibz */
case 1186: /* paciasp */
case 1185: /* paciaz */
case 1194: /* autibsp */
case 1193: /* autibz */
case 1192: /* autiasp */
case 1191: /* autiaz */
case 1190: /* pacibsp */
case 1189: /* pacibz */
case 1188: /* paciasp */
case 1187: /* paciaz */
case 1172: /* psb */
case 1171: /* esb */
case 1170: /* autib1716 */
......@@ -447,131 +447,136 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 1158: /* hint */
value = 1158; /* --> hint. */
break;
case 1181: /* tlbi */
case 1180: /* ic */
case 1179: /* dc */
case 1178: /* at */
case 1177: /* sys */
value = 1177; /* --> sys. */
case 1176: /* pssbb */
case 1175: /* ssbb */
case 1174: /* dsb */
value = 1174; /* --> dsb. */
break;
case 1990: /* bic */
case 1240: /* and */
value = 1240; /* --> and. */
case 1183: /* tlbi */
case 1182: /* ic */
case 1181: /* dc */
case 1180: /* at */
case 1179: /* sys */
value = 1179; /* --> sys. */
break;
case 1223: /* mov */
case 1992: /* bic */
case 1242: /* and */
value = 1242; /* --> and. */
break;
case 1227: /* movs */
case 1243: /* ands */
value = 1243; /* --> ands. */
case 1225: /* mov */
case 1244: /* and */
value = 1244; /* --> and. */
break;
case 1991: /* cmple */
case 1278: /* cmpge */
value = 1278; /* --> cmpge. */
case 1229: /* movs */
case 1245: /* ands */
value = 1245; /* --> ands. */
break;
case 1994: /* cmplt */
case 1281: /* cmpgt */
value = 1281; /* --> cmpgt. */
case 1993: /* cmple */
case 1280: /* cmpge */
value = 1280; /* --> cmpge. */
break;
case 1992: /* cmplo */
case 1283: /* cmphi */
value = 1283; /* --> cmphi. */
case 1996: /* cmplt */
case 1283: /* cmpgt */
value = 1283; /* --> cmpgt. */
break;
case 1993: /* cmpls */
case 1286: /* cmphs */
value = 1286; /* --> cmphs. */
case 1994: /* cmplo */
case 1285: /* cmphi */
value = 1285; /* --> cmphi. */
break;
case 1220: /* mov */
case 1308: /* cpy */
value = 1308; /* --> cpy. */
case 1995: /* cmpls */
case 1288: /* cmphs */
value = 1288; /* --> cmphs. */
break;
case 1222: /* mov */
case 1309: /* cpy */
value = 1309; /* --> cpy. */
break;
case 2001: /* fmov */
case 1225: /* mov */
case 1310: /* cpy */
value = 1310; /* --> cpy. */
break;
case 1215: /* mov */
case 1322: /* dup */
value = 1322; /* --> dup. */
case 1224: /* mov */
case 1311: /* cpy */
value = 1311; /* --> cpy. */
break;
case 1217: /* mov */
case 1214: /* mov */
case 1323: /* dup */
value = 1323; /* --> dup. */
case 2003: /* fmov */
case 1227: /* mov */
case 1312: /* cpy */
value = 1312; /* --> cpy. */
break;
case 2000: /* fmov */
case 1219: /* mov */
case 1217: /* mov */
case 1324: /* dup */
value = 1324; /* --> dup. */
break;
case 1218: /* mov */
case 1325: /* dupm */
value = 1325; /* --> dupm. */
case 1219: /* mov */
case 1216: /* mov */
case 1325: /* dup */
value = 1325; /* --> dup. */
break;
case 2002: /* fmov */
case 1221: /* mov */
case 1326: /* dup */
value = 1326; /* --> dup. */
break;
case 1995: /* eon */
case 1327: /* eor */
value = 1327; /* --> eor. */
case 1220: /* mov */
case 1327: /* dupm */
value = 1327; /* --> dupm. */
break;
case 1228: /* not */
case 1997: /* eon */
case 1329: /* eor */
value = 1329; /* --> eor. */
break;
case 1229: /* nots */
case 1330: /* eors */
value = 1330; /* --> eors. */
case 1230: /* not */
case 1331: /* eor */
value = 1331; /* --> eor. */
break;
case 1996: /* facle */
case 1335: /* facge */
value = 1335; /* --> facge. */
case 1231: /* nots */
case 1332: /* eors */
value = 1332; /* --> eors. */
break;
case 1997: /* faclt */
case 1336: /* facgt */
value = 1336; /* --> facgt. */
case 1998: /* facle */
case 1337: /* facge */
value = 1337; /* --> facge. */
break;
case 1998: /* fcmle */
case 1349: /* fcmge */
value = 1349; /* --> fcmge. */
case 1999: /* faclt */
case 1338: /* facgt */
value = 1338; /* --> facgt. */
break;
case 1999: /* fcmlt */
case 1351: /* fcmgt */
value = 1351; /* --> fcmgt. */
case 2000: /* fcmle */
case 1351: /* fcmge */
value = 1351; /* --> fcmge. */
break;
case 1212: /* fmov */
case 1357: /* fcpy */
value = 1357; /* --> fcpy. */
case 2001: /* fcmlt */
case 1353: /* fcmgt */
value = 1353; /* --> fcmgt. */
break;
case 1211: /* fmov */
case 1380: /* fdup */
value = 1380; /* --> fdup. */
case 1214: /* fmov */
case 1359: /* fcpy */
value = 1359; /* --> fcpy. */
break;
case 1213: /* mov */
case 1711: /* orr */
value = 1711; /* --> orr. */
case 1213: /* fmov */
case 1382: /* fdup */
value = 1382; /* --> fdup. */
break;
case 2002: /* orn */
case 1712: /* orr */
value = 1712; /* --> orr. */
case 1215: /* mov */
case 1713: /* orr */
value = 1713; /* --> orr. */
break;
case 1216: /* mov */
case 2004: /* orn */
case 1714: /* orr */
value = 1714; /* --> orr. */
break;
case 1226: /* movs */
case 1715: /* orrs */
value = 1715; /* --> orrs. */
case 1218: /* mov */
case 1716: /* orr */
value = 1716; /* --> orr. */
break;
case 1221: /* mov */
case 1777: /* sel */
value = 1777; /* --> sel. */
case 1228: /* movs */
case 1717: /* orrs */
value = 1717; /* --> orrs. */
break;
case 1224: /* mov */
case 1778: /* sel */
value = 1778; /* --> sel. */
case 1223: /* mov */
case 1779: /* sel */
value = 1779; /* --> sel. */
break;
case 1226: /* mov */
case 1780: /* sel */
value = 1780; /* --> sel. */
break;
default: return NULL;
}
......
This diff is collapsed.
......@@ -294,17 +294,17 @@ static const unsigned op_enum_table [] =
385,
407,
409,
1218,
1223,
1216,
1221,
1214,
1213,
1217,
1224,
1215,
1219,
1226,
1227,
1223,
1229,
1228,
1229,
1225,
1231,
1230,
129,
};
......
......@@ -3483,7 +3483,9 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"esb", 0xd503221f, 0xffffffff, ic_system, 0, RAS, OP0 (), {}, F_ALIAS, 0, NULL},
{"psb", 0xd503223f, 0xffffffff, ic_system, 0, STAT_PROFILE, OP1 (BARRIER_PSB), {}, F_ALIAS, 0, NULL},
CORE_INSN ("clrex", 0xd503305f, 0xfffff0ff, ic_system, 0, OP1 (UIMM4), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, 0),
CORE_INSN ("dsb", 0xd503309f, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, F_HAS_ALIAS),
CORE_INSN ("ssbb", 0xd503309f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("pssbb", 0xd503349f, 0xffffffff, ic_system, 0, OP0 (), {}, F_ALIAS),
CORE_INSN ("dmb", 0xd50330bf, 0xfffff0ff, ic_system, 0, OP1 (BARRIER), {}, 0),
CORE_INSN ("isb", 0xd50330df, 0xfffff0ff, ic_system, 0, OP1 (BARRIER_ISB), {}, F_OPD0_OPT | F_DEFAULT (0xF)),
CORE_INSN ("sys", 0xd5080000, 0xfff80000, ic_system, 0, OP5 (UIMM3_OP1, CRn, CRm, UIMM3_OP2, Rt), QL_SYS, F_HAS_ALIAS | F_OPD4_OPT | F_DEFAULT (0x1F)),
......
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