Verified Commit 4d04a047 authored by jD91mZM2's avatar jD91mZM2

Disable f80 temporarily

parent a08a1a73
......@@ -67,11 +67,6 @@ dependencies = [
"termcolor 1.1.0 (registry+https://github.com/rust-lang/crates.io-index)",
]
[[package]]
name = "f80"
version = "0.1.0"
source = "git+https://gitlab.redox-os.org/redox-os/f80.git?rev=d8de286#d8de286afe27934c6ac002153e1610f100853ef9"
[[package]]
name = "gdb-remote-protocol"
version = "0.1.0"
......@@ -92,7 +87,6 @@ version = "0.1.0"
dependencies = [
"byteorder 1.3.4 (registry+https://github.com/rust-lang/crates.io-index)",
"env_logger 0.7.1 (registry+https://github.com/rust-lang/crates.io-index)",
"f80 0.1.0 (git+https://gitlab.redox-os.org/redox-os/f80.git?rev=d8de286)",
"gdb-remote-protocol 0.1.0",
"libc 0.2.71 (registry+https://github.com/rust-lang/crates.io-index)",
"log 0.4.8 (registry+https://github.com/rust-lang/crates.io-index)",
......@@ -469,7 +463,6 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
"checksum cfg-if 0.1.10 (registry+https://github.com/rust-lang/crates.io-index)" = "4785bdd1c96b2a846b2bd7cc02e86b6b3dbf14e7e53446c4f54c92a361040822"
"checksum clap 2.33.1 (registry+https://github.com/rust-lang/crates.io-index)" = "bdfa80d47f954d53a35a64987ca1422f495b8d6483c0fe9f7117b36c2a792129"
"checksum env_logger 0.7.1 (registry+https://github.com/rust-lang/crates.io-index)" = "44533bbbb3bb3c1fa17d9f2e4e38bbbaf8396ba82193c4cb1b6445d711445d36"
"checksum f80 0.1.0 (git+https://gitlab.redox-os.org/redox-os/f80.git?rev=d8de286)" = "<none>"
"checksum heck 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)" = "20564e78d53d2bb135c343b3f47714a56af2061f1c928fdb541dc7b9fdd94205"
"checksum hermit-abi 0.1.14 (registry+https://github.com/rust-lang/crates.io-index)" = "b9586eedd4ce6b3c498bc3b4dd92fc9f11166aa908a914071953768066c67909"
"checksum humantime 1.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = "df004cfca50ef23c36850aaaa59ad52cc70d0e90243c3c7737a4dd32dc7a3c4f"
......
......@@ -11,7 +11,7 @@ memchr = "2.3.3"
env_logger = "0.7.1"
log = "0.4.8"
byteorder = "1.3.4"
f80 = { git = "https://gitlab.redox-os.org/redox-os/f80.git", rev = "d8de286" }
# f80 = { git = "https://gitlab.redox-os.org/redox-os/f80.git", rev = "d8de286" }
[target.'cfg(target_os = "linux")'.dependencies]
libc = "0.2.71"
......
use byteorder::{NativeEndian, ReadBytesExt, WriteBytesExt};
use f80::f80;
#[derive(Default)]
pub struct Registers {
// Gotten from gnu-binutils/gdb/regformats/i386/amd64-linux.dat
pub rax: Option<u64>,
pub rbx: Option<u64>,
pub rcx: Option<u64>,
......@@ -94,14 +92,14 @@ impl Registers {
fs: Some(input.read_u32::<NativeEndian>().unwrap()),
gs: Some(input.read_u32::<NativeEndian>().unwrap()),
st0: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st1: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st2: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st3: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st4: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st5: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st6: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st7: Some(f80::from_f64(f64::from_bits(input.read_u64::<NativeEndian>().unwrap())).to_bits()),
st0: Some(0),
st1: Some(0),
st2: Some(0),
st3: Some(0),
st4: Some(0),
st5: Some(0),
st6: Some(0),
st7: Some(0),
fctrl: Some(input.read_u32::<NativeEndian>().unwrap()),
fstat: Some(input.read_u32::<NativeEndian>().unwrap()),
ftag: Some(input.read_u32::<NativeEndian>().unwrap()),
......@@ -157,14 +155,14 @@ impl Registers {
output.write_u32::<NativeEndian>(self.fs.unwrap_or(0)).unwrap();
output.write_u32::<NativeEndian>(self.gs.unwrap_or(0)).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st0.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st1.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st2.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st3.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st4.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st5.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st6.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(f80::from_bits(self.st7.unwrap_or(0)).to_f64().to_bits()).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u64::<NativeEndian>(0).unwrap();
output.write_u32::<NativeEndian>(self.fctrl.unwrap_or(0)).unwrap();
output.write_u32::<NativeEndian>(self.fstat.unwrap_or(0)).unwrap();
output.write_u32::<NativeEndian>(self.ftag.unwrap_or(0)).unwrap();
......
......@@ -32,14 +32,14 @@
<reg name="es" bitsize="32" group="general" />
<reg name="fs" bitsize="32" group="general" />
<reg name="gs" bitsize="32" group="general" />
<reg name="st0" bitsize="80" type="float" group="float" />
<reg name="st1" bitsize="80" type="float" group="float" />
<reg name="st2" bitsize="80" type="float" group="float" />
<reg name="st3" bitsize="80" type="float" group="float" />
<reg name="st4" bitsize="80" type="float" group="float" />
<reg name="st5" bitsize="80" type="float" group="float" />
<reg name="st6" bitsize="80" type="float" group="float" />
<reg name="st7" bitsize="80" type="float" group="float" />
<reg name="st0" bitsize="64" type="float" group="float" />
<reg name="st1" bitsize="64" type="float" group="float" />
<reg name="st2" bitsize="64" type="float" group="float" />
<reg name="st3" bitsize="64" type="float" group="float" />
<reg name="st4" bitsize="64" type="float" group="float" />
<reg name="st5" bitsize="64" type="float" group="float" />
<reg name="st6" bitsize="64" type="float" group="float" />
<reg name="st7" bitsize="64" type="float" group="float" />
<reg name="fctrl" bitsize="32" type="float" group="float" />
<reg name="fstat" bitsize="32" type="float" group="float" />
<reg name="ftag" bitsize="32" type="float" group="float" />
......
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