From bdea7f553a782f2ebdfdf3bc54f904f936e3befd Mon Sep 17 00:00:00 2001 From: Jeremy Soller <jeremy@system76.com> Date: Fri, 15 Jan 2021 06:57:02 -0700 Subject: [PATCH] Remove PRESENT flag from aarch64 descriptors --- src/arch/aarch64/paging/entry.rs | 10 ++++------ src/arch/aarch64/paging/mapper.rs | 6 +----- src/arch/aarch64/paging/mod.rs | 6 +++--- src/arch/aarch64/paging/table.rs | 5 ++--- 4 files changed, 10 insertions(+), 17 deletions(-) diff --git a/src/arch/aarch64/paging/entry.rs b/src/arch/aarch64/paging/entry.rs index cee4701e..249732e1 100644 --- a/src/arch/aarch64/paging/entry.rs +++ b/src/arch/aarch64/paging/entry.rs @@ -18,7 +18,6 @@ bitflags! { const VALID = 1 << 0; const TABLE = 1 << 1; const AF = 1 << 10; /* NOTE: TableDescriptors don't actually have an AF bit! */ - const PRESENT = 1 << 58; /* ARM ARM says this is an IGNORED bit, so using it here should be OK */ const PXNTABLE = 1 << 59; const UXNTABLE = 1 << 60; const APTABLE_0 = 1 << 61; @@ -48,7 +47,6 @@ bitflags! { const CONTIGUOUS = 1 << 52; const PXN = 1 << 53; const UXN = 1 << 54; - const PRESENT = 1 << 58; /* Assuming DBM can be overloaded as PRESENT */ } } @@ -108,7 +106,7 @@ impl Entry { /// Get the associated frame, if available, for a level 4, 3, or 2 page pub fn pointed_frame(&self) -> Option<Frame> { - if self.page_table_entry_flags().contains(TableDescriptorFlags::PRESENT) { + if self.page_table_entry_flags().contains(TableDescriptorFlags::VALID) { Some(Frame::containing_address(self.address())) } else { None @@ -117,7 +115,7 @@ impl Entry { /// Get the associated frame, if available, for a level 1 page pub fn pointed_frame_at_l1(&self) -> Option<Frame> { - if self.page_descriptor_entry_flags().contains(PageDescriptorFlags::PRESENT) { + if self.page_descriptor_entry_flags().contains(PageDescriptorFlags::VALID) { Some(Frame::containing_address(self.address())) } else { None @@ -142,10 +140,10 @@ impl Entry { debug_assert!(frame.start_address().data() & !ADDRESS_MASK == 0); // ODDNESS Alert: We need to set the AF bit - despite this being a TableDescriptor!!! // The Arm ARM says this bit (bit 10) is IGNORED in Table Descriptors so hopefully this is OK - let mut translated_flags = TableDescriptorFlags::AF | TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE; + let mut translated_flags = TableDescriptorFlags::AF | TableDescriptorFlags::TABLE; if flags.contains(EntryFlags::PRESENT) { - translated_flags.insert(TableDescriptorFlags::PRESENT); + translated_flags.insert(TableDescriptorFlags::VALID); } self.0 = (frame.start_address().data() as u64) | translated_flags.bits() | (self.0 & COUNTER_MASK); diff --git a/src/arch/aarch64/paging/mapper.rs b/src/arch/aarch64/paging/mapper.rs index 3c2fe45d..9828b99b 100644 --- a/src/arch/aarch64/paging/mapper.rs +++ b/src/arch/aarch64/paging/mapper.rs @@ -110,8 +110,6 @@ impl Mapper { let p1 = p2.next_table_create(page.p2_index()); let mut translated_flags: PageDescriptorFlags = PageDescriptorFlags::VALID | PageDescriptorFlags::PAGE | PageDescriptorFlags::AF; - translated_flags.insert(PageDescriptorFlags::PRESENT); - if flags.contains(EntryFlags::NO_EXECUTE) { match page.start_address().get_type() { VAddrType::User => { @@ -165,8 +163,6 @@ impl Mapper { let frame = p1[page.p1_index()].pointed_frame_at_l1().expect("failed to remap: not mapped"); let mut translated_flags: PageDescriptorFlags = PageDescriptorFlags::VALID | PageDescriptorFlags::PAGE | PageDescriptorFlags::AF; - translated_flags.insert(PageDescriptorFlags::PRESENT); - if flags.contains(EntryFlags::NO_EXECUTE) { match page.start_address().get_type() { VAddrType::User => { @@ -301,7 +297,7 @@ impl Mapper { .and_then(|p2| p2.next_table(page.p2_index())) .and_then(|p1| Some(p1[page.p1_index()].page_descriptor_entry_flags())) { - if flags.contains(PageDescriptorFlags::PRESENT) { + if flags.contains(PageDescriptorFlags::VALID) { translated_flags.insert(EntryFlags::PRESENT); } diff --git a/src/arch/aarch64/paging/mod.rs b/src/arch/aarch64/paging/mod.rs index 73cc6dbf..b52c79dc 100644 --- a/src/arch/aarch64/paging/mod.rs +++ b/src/arch/aarch64/paging/mod.rs @@ -301,7 +301,7 @@ impl ActivePageTable { // overwrite recursive mapping self.p4_mut()[crate::RECURSIVE_PAGE_PML4].page_table_entry_set( table.p4_frame.clone(), - TableDescriptorFlags::PRESENT | TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE, + TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE, ); self.flush_all(); @@ -311,7 +311,7 @@ impl ActivePageTable { // restore recursive mapping to original p4 table p4_table[crate::RECURSIVE_PAGE_PML4].page_table_entry_set( backup, - TableDescriptorFlags::PRESENT | TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE, + TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE, ); self.flush_all(); } @@ -357,7 +357,7 @@ impl InactivePageTable { // set up recursive mapping for the table table[crate::RECURSIVE_PAGE_PML4].page_table_entry_set( frame.clone(), - TableDescriptorFlags::PRESENT | TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE + TableDescriptorFlags::VALID | TableDescriptorFlags::TABLE ); } temporary_page.unmap(active_table); diff --git a/src/arch/aarch64/paging/table.rs b/src/arch/aarch64/paging/table.rs index 88273159..ccedf7e4 100644 --- a/src/arch/aarch64/paging/table.rs +++ b/src/arch/aarch64/paging/table.rs @@ -121,8 +121,7 @@ impl<L> Table<L> where L: HierarchicalLevel { self.increment_entry_count(); /* Allow users to go down the page table, implement permissions at the page level */ - let mut perms = TableDescriptorFlags::PRESENT; - perms |= TableDescriptorFlags::VALID; + let mut perms = TableDescriptorFlags::VALID; perms |= TableDescriptorFlags::TABLE; self[index].page_table_entry_set(frame, perms); @@ -133,7 +132,7 @@ impl<L> Table<L> where L: HierarchicalLevel { fn next_table_address(&self, index: usize) -> Option<usize> { let entry_flags = self[index].page_table_entry_flags(); - if entry_flags.contains(TableDescriptorFlags::PRESENT) { + if entry_flags.contains(TableDescriptorFlags::VALID) { let table_address = self as *const _ as usize; if (table_address & KSPACE_ADDR_MASK) != 0 { Some((table_address << 9) | (index << 12)) -- GitLab