diff --git a/src/arch/x86_64/device/local_apic.rs b/src/arch/x86_64/device/local_apic.rs
index 895a55b32961ed5ed9a9e2277ad78aa6cd490d9c..38a8e1cc217d0c1a2e54991a6a90b65a55ec58e6 100644
--- a/src/arch/x86_64/device/local_apic.rs
+++ b/src/arch/x86_64/device/local_apic.rs
@@ -251,210 +251,6 @@ impl LocalApic {
 
         Ok(())
     }
-    pub unsafe fn isr_bits_31_0(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR0) as u32
-        } else {
-            self.read(0x100)
-        }
-    }
-    pub unsafe fn isr_bits_63_32(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR1) as u32
-        } else {
-            self.read(0x110)
-        }
-    }
-    pub unsafe fn isr_bits_95_64(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR2) as u32
-        } else {
-            self.read(0x120)
-        }
-    }
-    pub unsafe fn isr_bits_127_96(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR3) as u32
-        } else {
-            self.read(0x130)
-        }
-    }
-    pub unsafe fn isr_bits_159_128(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR4) as u32
-        } else {
-            self.read(0x140)
-        }
-    }
-    pub unsafe fn isr_bits_191_160(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR5) as u32
-        } else {
-            self.read(0x150)
-        }
-    }
-    pub unsafe fn isr_bits_223_192(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR6) as u32
-        } else {
-            self.read(0x160)
-        }
-    }
-    pub unsafe fn isr_bits_255_224(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_ISR7) as u32
-        } else {
-            self.read(0x170)
-        }
-    }
-    pub unsafe fn entire_isr(&mut self) -> [u32; 8] {
-        [
-            self.isr_bits_31_0(),
-            self.isr_bits_63_32(),
-            self.isr_bits_95_64(),
-            self.isr_bits_127_96(),
-            self.isr_bits_159_128(),
-            self.isr_bits_191_160(),
-            self.isr_bits_223_192(),
-            self.isr_bits_255_224(),
-        ]
-    }
-    pub unsafe fn tmr_bits_31_0(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR0) as u32
-        } else {
-            self.read(0x180)
-        }
-    }
-    pub unsafe fn tmr_bits_63_32(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR1) as u32
-        } else {
-            self.read(0x190)
-        }
-    }
-    pub unsafe fn tmr_bits_95_64(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR2) as u32
-        } else {
-            self.read(0x1A0)
-        }
-    }
-    pub unsafe fn tmr_bits_127_96(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR3) as u32
-        } else {
-            self.read(0x1B0)
-        }
-    }
-    pub unsafe fn tmr_bits_159_128(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR4) as u32
-        } else {
-            self.read(0x1C0)
-        }
-    }
-    pub unsafe fn tmr_bits_191_160(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR5) as u32
-        } else {
-            self.read(0x1D0)
-        }
-    }
-    pub unsafe fn tmr_bits_223_192(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR6) as u32
-        } else {
-            self.read(0x1E0)
-        }
-    }
-    pub unsafe fn tmr_bits_255_224(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_TMR7) as u32
-        } else {
-            self.read(0x1F0)
-        }
-    }
-    pub unsafe fn entire_tmr(&mut self) -> [u32; 8] {
-        [
-            self.tmr_bits_31_0(),
-            self.tmr_bits_63_32(),
-            self.tmr_bits_95_64(),
-            self.tmr_bits_127_96(),
-            self.tmr_bits_159_128(),
-            self.tmr_bits_191_160(),
-            self.tmr_bits_223_192(),
-            self.tmr_bits_255_224(),
-        ]
-    }
-    pub unsafe fn irr_bits_31_0(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR0) as u32
-        } else {
-            self.read(0x200)
-        }
-    }
-    pub unsafe fn irr_bits_63_32(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR1) as u32
-        } else {
-            self.read(0x210)
-        }
-    }
-    pub unsafe fn irr_bits_95_64(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR2) as u32
-        } else {
-            self.read(0x220)
-        }
-    }
-    pub unsafe fn irr_bits_127_96(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR3) as u32
-        } else {
-            self.read(0x230)
-        }
-    }
-    pub unsafe fn irr_bits_159_128(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR4) as u32
-        } else {
-            self.read(0x240)
-        }
-    }
-    pub unsafe fn irr_bits_191_160(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR5) as u32
-        } else {
-            self.read(0x250)
-        }
-    }
-    pub unsafe fn irr_bits_223_192(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR6) as u32
-        } else {
-            self.read(0x260)
-        }
-    }
-    pub unsafe fn irr_bits_255_224(&mut self) -> u32 {
-        if self.x2 {
-            rdmsr(IA32_X2APIC_IRR7) as u32
-        } else {
-            self.read(0x270)
-        }
-    }
-    pub unsafe fn entire_irr(&mut self) -> [u32; 8] {
-        [
-            self.irr_bits_31_0(),
-            self.irr_bits_63_32(),
-            self.irr_bits_95_64(),
-            self.irr_bits_127_96(),
-            self.irr_bits_159_128(),
-            self.irr_bits_191_160(),
-            self.irr_bits_223_192(),
-            self.irr_bits_255_224(),
-        ]
-    }
 
     /// Determine the APIC timer frequency, if the info wasn't already retrieved directly from the
     /// CPU.