redox-rt/src/arch/aarch64.rs

+use core::{mem::offset_of, ptr::NonNull};
+
+use syscall::{data::*, error::*};
+
+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{inner_c, PosixStackt, RtSigarea, SigStack, PROC_CONTROL_STRUCT},
+    RtTcb, Tcb,
+};
+
+// Setup a stack starting from the very end of the address space, and then growing downwards.
+pub(crate) const STACK_TOP: usize = 1 << 47;
+pub(crate) const STACK_SIZE: usize = 1024 * 1024;
+
+#[derive(Debug, Default)]
+#[repr(C)]
+pub struct SigArea {
+    pub altstack_top: usize,
+    pub altstack_bottom: usize,
+    pub tmp_x1_x2: [usize; 2],
+    pub tmp_x3_x4: [usize; 2],
+    pub tmp_x5_x6: [usize; 2],
+    pub tmp_sp: usize,
+    pub onstack: u64,
+    pub disable_signals_depth: u64,
+    pub pctl: usize, // TODO: remove
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
+}
+#[repr(C)]
+#[derive(Debug, Default)]
+pub struct ArchIntRegs {
+    pub x30: usize,
+    pub x29: usize,
+    pub x28: usize,
+    pub x27: usize,
+    pub x26: usize,
+    pub x25: usize,
+    pub x24: usize,
+    pub x23: usize,
+    pub x22: usize,
+    pub x21: usize,
+    pub x20: usize,
+    pub x19: usize,
+    pub x18: usize,
+    pub x17: usize,
+    pub x16: usize,
+    pub x15: usize,
+    pub x14: usize,
+    pub x13: usize,
+    pub x12: usize,
+    pub x11: usize,
+    pub x10: usize,
+    pub x9: usize,
+    pub x8: usize,
+    pub x7: usize,
+    pub x6: usize,
+    pub x5: usize,
+    pub x4: usize,
+    pub x3: usize,
+    pub x2: usize,
+    pub x1: usize,
+
+    pub sp: usize,
+    pub nzcv: usize, // user-accessible PSTATE bits
+
+    pub pc: usize,
+    pub x0: usize,
+}
+
+/// Deactive TLS, used before exec() on Redox to not trick target executable into thinking TLS
+/// is already initialized as if it was a thread.
+pub unsafe fn deactivate_tcb(open_via_dup: usize) -> Result<()> {
+    let mut env = syscall::EnvRegisters::default();
+
+    let file = FdGuard::new(syscall::dup(open_via_dup, b"regs/env")?);
+
+    env.tpidr_el0 = 0;
+
+    let _ = syscall::write(*file, &mut env)?;
+    Ok(())
+}
+
+pub fn copy_env_regs(cur_pid_fd: usize, new_pid_fd: usize) -> Result<()> {
+    // Copy environment registers.
+    {
+        let cur_env_regs_fd = FdGuard::new(syscall::dup(cur_pid_fd, b"regs/env")?);
+        let new_env_regs_fd = FdGuard::new(syscall::dup(new_pid_fd, b"regs/env")?);
+
+        let mut env_regs = syscall::EnvRegisters::default();
+        let _ = syscall::read(*cur_env_regs_fd, &mut env_regs)?;
+        let _ = syscall::write(*new_env_regs_fd, &env_regs)?;
+    }
+
+    Ok(())
+}
+
+unsafe extern "C" fn fork_impl(initial_rsp: *mut usize) -> usize {
+    Error::mux(fork_inner(initial_rsp))
+}
+
+unsafe extern "C" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
+    let _ = syscall::close(cur_filetable_fd);
+    // TODO: Currently pidfd == threadfd, but this will not be the case later.
+    RtTcb::current()
+        .thr_fd
+        .get()
+        .write(Some(FdGuard::new(new_pid_fd)));
+}
+
+asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
+    stp     x29, x30, [sp, #-16]!
+    stp     x27, x28, [sp, #-16]!
+    stp     x25, x26, [sp, #-16]!
+    stp     x23, x24, [sp, #-16]!
+    stp     x21, x22, [sp, #-16]!
+    stp     x19, x20, [sp, #-16]!
+
+    sub sp, sp, #32
+
+    //TODO: store floating point regs
+
+    mov x0, sp
+    bl {fork_impl}
+
+    add sp, sp, #32
+    ldp     x19, x20, [sp], #16
+    ldp     x21, x22, [sp], #16
+    ldp     x23, x24, [sp], #16
+    ldp     x25, x26, [sp], #16
+    ldp     x27, x28, [sp], #16
+    ldp     x29, x30, [sp], #16
+    ret
+"] <= [fork_impl = sym fork_impl]);
+
+asmfunction!(__relibc_internal_fork_ret: ["
+    ldp x0, x1, [sp]
+    bl {child_hook}
+
+    //TODO: load floating point regs
+
+    mov x0, xzr
+
+    add sp, sp, #32
+    ldp     x19, x20, [sp], #16
+    ldp     x21, x22, [sp], #16
+    ldp     x23, x24, [sp], #16
+    ldp     x25, x26, [sp], #16
+    ldp     x27, x28, [sp], #16
+    ldp     x29, x30, [sp], #16
+
+    ret
+"] <= [child_hook = sym child_hook]);
+
+// https://devblogs.microsoft.com/oldnewthing/20220811-00/?p=106963
+asmfunction!(__relibc_internal_sigentry: ["
+    // Clear any active reservation.
+    clrex
+
+    // The old pc and x0 are saved in the sigcontrol struct.
+    mrs x0, tpidr_el0 // ABI ptr
+    ldr x0, [x0] // TCB ptr
+
+    // Save x1-x6 and sp
+    stp x1, x2, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
+    stp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
+    stp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
+    mov x1, sp
+    str x1, [x0, #{tcb_sa_off} + {sa_tmp_sp}]
+
+    ldr x6, [x0, #{tcb_sa_off} + {sa_pctl}]
+1:
+    // Load x1 with the thread's bits
+    add x5, x0, #{tcb_sc_off} + {sc_word}
+    ldaxr x1, [x5]
+
+    // First check if there are standard thread signals,
+    and x4, x1, x1, lsr #32 // x4 := x1 & (x1 >> 32)
+    cbnz x4, 3f // jump if x4 != 0
+    clrex
+
+    // and if not, load process pending bitset.
+    add x5, x6, #{pctl_pending}
+    ldaxr x2, [x5]
+
+    // Check if there are standard proc signals:
+    lsr x3, x1, #32 // mask
+    and w3, w2, w3 // pending unblocked proc
+    cbz w3, 4f // skip 'fetch_andn' step if zero
+
+    // If there was one, find which one, and try clearing the bit (last value in x3, addr in x6)
+    // this picks the MSB rather than the LSB, unlike x86. POSIX does not require any specific
+    // ordering though.
+    clz w3, w3
+    mov w4, #31
+    sub w3, w4, w3
+    // x3 now contains the sig_idx
+
+    mov x4, #1
+    lsl x4, x4, x3 // bit to remove
+
+    sub x4, x2, x4 // bit was certainly set, so sub is allowed
+    // x4 is now the new mask to be set
+    add x5, x6, #{pctl_pending}
+
+    add x2, x5, #{pctl_sender_infos}
+    add x2, x2, w3, uxtb 3
+    ldar x2, [x2]
+
+    // Try clearing the bit, retrying on failure.
+    stxr w1, x4, [x5] // try setting pending set to x4, set w1 := 0 on success
+    cbnz w1, 1b // retry everything if this fails
+    mov x1, x3
+    b 2f
+4:
+    // Check for realtime signals, thread/proc.
+    clrex
+
+    // Load the pending set again. TODO: optimize this?
+    add x1, x6, #{pctl_pending}
+    ldaxr x2, [x1]
+    lsr x2, x2, #32
+
+    add x5, x0, #{tcb_sc_off} + {sc_word} + 8
+    ldar x1, [x5]
+
+    orr x2, x1, x2
+    and x2, x2, x2, lsr #32
+    cbz x2, 7f
+
+    rbit x3, x2
+    clz x3, x3
+    mov x4, #31
+    sub x2, x4, x3
+    // x2 now contains sig_idx - 32
+
+    // If realtime signal was directed at thread, handle it as an idempotent signal.
+    lsr x3, x1, x2
+    tbnz x3, #0, 5f
+
+    mov x5, x0
+    mov x4, x8
+    mov x8, #{SYS_SIGDEQUEUE}
+    mov x0, x1
+    add x1, x0, #{tcb_sa_off} + {sa_tmp_rt_inf}
+    svc 0
+    mov x0, x5
+    mov x8, x4
+    cbnz x0, 1b
+
+    b 2f
+5:
+    // A realtime signal was sent to this thread, try clearing its bit.
+    // x3 contains last rt signal word, x2 contains rt_idx
+    clrex
+
+    // Calculate the absolute sig_idx
+    add x1, x3, 32
+
+    // Load si_pid and si_uid
+    add x2, x0, #{tcb_sc_off} + {sc_sender_infos}
+    add x2, x2, w1, uxtb #3
+    ldar x2, [x2]
+
+    add x3, x0, #{tcb_sc_off} + {sc_word} + 8
+    ldxr x2, [x3]
+
+    // Calculate new mask
+    mov x4, #1
+    lsl x4, x4, x2
+    sub x2, x2, x4 // remove bit
+
+    stxr w5, x2, [x3]
+    cbnz w5, 1b
+    str x2, [x0, #{tcb_sa_off} + {sa_tmp_id_inf}]
+    b 2f
+3:
+    // A standard signal was sent to this thread, try clearing its bit.
+    clz x1, x1
+    mov x2, #31
+    sub x1, x2, x1
+
+    // Load si_pid and si_uid
+    add x2, x0, #{tcb_sc_off} + {sc_sender_infos}
+    add x2, x2, w1, uxtb #3
+    ldar x2, [x2]
+
+    // Clear bit from mask
+    mov x3, #1
+    lsl x3, x3, x1
+    sub x4, x4, x3
+
+    // Try updating the mask
+    stxr w3, x1, [x5]
+    cbnz w3, 1b
+
+    str x2, [x0, #{tcb_sa_off} + {sa_tmp_id_inf}]
+2:
+    ldr x3, [x0, #{tcb_sa_off} + {sa_pctl}]
+    add x2, x2, {pctl_actions}
+    add x2, x3, w1, uxtb #4 // actions_base + sig_idx * sizeof Action
+    // TODO: NOT ATOMIC (tearing allowed between regs)!
+    ldxp x2, x3, [x2]
+    clrex
+
+    // Calculate new sp wrt redzone and alignment
+    mov x4, sp
+    sub x4, x4, {REDZONE_SIZE}
+    and x4, x4, -{STACK_ALIGN}
+    mov sp, x4
+
+    // skip sigaltstack step if SA_ONSTACK is clear
+    // tbz x2, #{SA_ONSTACK_BIT}, 2f
+
+    ldr x2, [x0, #{tcb_sc_off} + {sc_saved_pc}]
+    ldr x3, [x0, #{tcb_sc_off} + {sc_saved_x0}]
+    stp x2, x3, [sp, #-16]!
+
+    ldr x2, [x0, #{tcb_sa_off} + {sa_tmp_sp}]
+    mrs x3, nzcv
+    stp x2, x3, [sp, #-16]!
+
+    ldp x2, x3, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
+    stp x2, x3, [sp, #-16]!
+    ldp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
+    stp x4, x3, [sp, #-16]!
+    ldp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
+    stp x6, x5, [sp, #-16]!
+
+    stp x8, x7, [sp, #-16]!
+    stp x10, x9, [sp, #-16]!
+    stp x12, x11, [sp, #-16]!
+    stp x14, x13, [sp, #-16]!
+    stp x16, x15, [sp, #-16]!
+    stp x18, x17, [sp, #-16]!
+    stp x20, x19, [sp, #-16]!
+    stp x22, x21, [sp, #-16]!
+    stp x24, x23, [sp, #-16]!
+    stp x26, x25, [sp, #-16]!
+    stp x28, x27, [sp, #-16]!
+    stp x30, x29, [sp, #-16]!
+
+    str w1, [sp, #-4]
+    sub sp, sp, #64
+
+    mov x0, sp
+    bl {inner}
+
+    add sp, sp, #64
+
+    ldp x30, x29, [sp], #16
+    ldp x28, x27, [sp], #16
+    ldp x26, x25, [sp], #16
+    ldp x24, x23, [sp], #16
+    ldp x22, x21, [sp], #16
+    ldp x20, x19, [sp], #16
+    ldp x18, x17, [sp], #16
+    ldp x16, x15, [sp], #16
+    ldp x14, x13, [sp], #16
+    ldp x12, x11, [sp], #16
+    ldp x10, x9, [sp], #16
+    ldp x8, x7, [sp], #16
+    ldp x6, x5, [sp], #16
+    ldp x4, x3, [sp], #16
+    ldp x2, x1, [sp], #16
+
+    ldr x0, [sp, #8]
+    msr nzcv, x0
+
+8:
+    // x18 is reserved by ABI as 'platform register', so clobbering it should be safe.
+    mov x18, sp
+    ldr x0, [x18]
+    mov sp, x0
+
+    ldp x18, x0, [x18, #16]
+    br x18
+7:
+    // Spurious signal, i.e. all bitsets were 0 at the time they were checked
+    clrex
+
+    ldr x1, [x0, #{tcb_sc_off} + {sc_flags}]
+    and x1, x1, ~1
+    str x1, [x0, #{tcb_sc_off} + {sc_flags}]
+
+    ldp x1, x2, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
+    ldp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
+    ldp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
+    ldr x18, [x0, #{tcb_sc_off} + {sc_saved_pc}]
+    ldr x0, [x0, #{tcb_sc_off} + {sc_saved_x0}]
+    br x18
+"] <= [
+    pctl_pending = const (offset_of!(SigProcControl, pending)),
+    pctl_actions = const (offset_of!(SigProcControl, actions)),
+    pctl_sender_infos = const (offset_of!(SigProcControl, sender_infos)),
+    tcb_sc_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control)),
+    tcb_sa_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch)),
+    sa_tmp_x1_x2 = const offset_of!(SigArea, tmp_x1_x2),
+    sa_tmp_x3_x4 = const offset_of!(SigArea, tmp_x3_x4),
+    sa_tmp_x5_x6 = const offset_of!(SigArea, tmp_x5_x6),
+    sa_tmp_sp = const offset_of!(SigArea, tmp_sp),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
+    sa_pctl = const offset_of!(SigArea, pctl),
+    sc_saved_pc = const offset_of!(Sigcontrol, saved_ip),
+    sc_saved_x0 = const offset_of!(Sigcontrol, saved_archdep_reg),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
+    sc_word = const offset_of!(Sigcontrol, word),
+    sc_flags = const offset_of!(Sigcontrol, control_flags),
+    inner = sym inner_c,
+
+    SA_ONSTACK_BIT = const 58, // (1 << 58) >> 32 = 0x0400_0000
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
+    STACK_ALIGN = const 16,
+    REDZONE_SIZE = const 128,
+]);
+
+asmfunction!(__relibc_internal_rlct_clone_ret: ["
+    # Load registers
+    ldp x8, x0, [sp], #16
+    ldp x1, x2, [sp], #16
+    ldp x3, x4, [sp], #16
+
+    # Call entry point
+    blr x8
+
+    ret
+"] <= []);
+
+pub fn current_sp() -> usize {
+    let sp: usize;
+    unsafe {
+        core::arch::asm!("mov {}, sp", out(reg) sp);
+    }
+    sp
+}
+
+pub unsafe fn manually_enter_trampoline() {
+    let ctl = &Tcb::current().unwrap().os_specific.control;
+
+    ctl.saved_archdep_reg.set(0);
+    let ip_location = &ctl.saved_ip as *const _ as usize;
+
+    core::arch::asm!("
+        bl 2f
+        b 3f
+    2:
+        str lr, [x0]
+        b __relibc_internal_sigentry
+    3:
+    ", inout("x0") ip_location => _, out("lr") _);
+}
+
+pub unsafe fn arch_pre(stack: &mut SigStack, os: &mut SigArea) -> PosixStackt {
+    PosixStackt {
+        sp: core::ptr::null_mut(), // TODO
+        size: 0,                   // TODO
+        flags: 0,                  // TODO
+    }
+}

redox-rt/src/arch/i686.rs

+use core::{mem::offset_of, ptr::NonNull, sync::atomic::Ordering};
+
+use syscall::*;
+
+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{inner_fastcall, PosixStackt, RtSigarea, SigStack, PROC_CONTROL_STRUCT},
+    RtTcb,
+};
+
+// Setup a stack starting from the very end of the address space, and then growing downwards.
+pub(crate) const STACK_TOP: usize = 1 << 31;
+pub(crate) const STACK_SIZE: usize = 1024 * 1024;
+
+#[derive(Debug, Default)]
+#[repr(C)]
+pub struct SigArea {
+    pub altstack_top: usize,
+    pub altstack_bottom: usize,
+    pub tmp_eip: usize,
+    pub tmp_esp: usize,
+    pub tmp_eax: usize,
+    pub tmp_ecx: usize,
+    pub tmp_edx: usize,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
+    pub tmp_mm0: u64,
+    pub pctl: usize, // TODO: reference pctl directly
+    pub disable_signals_depth: u64,
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
+}
+#[derive(Debug, Default)]
+#[repr(C, align(16))]
+pub struct ArchIntRegs {
+    pub fxsave: [u16; 29],
+
+    // ensure fxsave region is 16 byte aligned
+    pub _pad: [usize; 2], // fxsave "available" +0
+
+    pub ebp: usize, // fxsave "available" +8
+    pub esi: usize, // avail +12
+    pub edi: usize, // avail +16
+    pub ebx: usize, // avail +20
+    pub eax: usize, // avail +24
+    pub ecx: usize, // avail +28
+    pub edx: usize, // avail +32
+
+    pub eflags: usize, // avail +36
+    pub eip: usize,    // avail +40
+    pub esp: usize,    // avail +44
+}
+
+/// Deactive TLS, used before exec() on Redox to not trick target executable into thinking TLS
+/// is already initialized as if it was a thread.
+pub unsafe fn deactivate_tcb(open_via_dup: usize) -> Result<()> {
+    let mut env = syscall::EnvRegisters::default();
+
+    let file = FdGuard::new(syscall::dup(open_via_dup, b"regs/env")?);
+
+    env.fsbase = 0;
+    env.gsbase = 0;
+
+    let _ = syscall::write(*file, &mut env)?;
+    Ok(())
+}
+
+pub fn copy_env_regs(cur_pid_fd: usize, new_pid_fd: usize) -> Result<()> {
+    // Copy environment registers.
+    {
+        let cur_env_regs_fd = FdGuard::new(syscall::dup(cur_pid_fd, b"regs/env")?);
+        let new_env_regs_fd = FdGuard::new(syscall::dup(new_pid_fd, b"regs/env")?);
+
+        let mut env_regs = syscall::EnvRegisters::default();
+        let _ = syscall::read(*cur_env_regs_fd, &mut env_regs)?;
+        let _ = syscall::write(*new_env_regs_fd, &env_regs)?;
+    }
+
+    Ok(())
+}
+
+unsafe extern "cdecl" fn fork_impl(initial_rsp: *mut usize) -> usize {
+    Error::mux(fork_inner(initial_rsp))
+}
+
+unsafe extern "cdecl" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
+    let _ = syscall::close(cur_filetable_fd);
+    crate::child_hook_common(FdGuard::new(new_pid_fd));
+}
+
+asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
+    push ebp
+    mov ebp, esp
+
+    // Push preserved registers
+    push ebx
+    push edi
+    push esi
+    push ebp
+
+    sub esp, 32
+
+    //TODO stmxcsr [esp+16]
+    fnstcw [esp+24]
+
+    push esp
+    call {fork_impl}
+    pop esp
+    jmp 2f
+"] <= [fork_impl = sym fork_impl]);
+
+asmfunction!(__relibc_internal_fork_ret: ["
+    // Arguments already on the stack
+    call {child_hook}
+
+    //TODO ldmxcsr [esp+16]
+    fldcw [esp+24]
+
+    xor eax, eax
+
+    .p2align 4
+2:
+    add esp, 32
+
+    // Pop preserved registers
+    pop ebp
+    pop esi
+    pop edi
+    pop ebx
+
+    pop ebp
+    ret
+"] <= [child_hook = sym child_hook]);
+asmfunction!(__relibc_internal_sigentry: ["
+    // Save some registers
+    mov gs:[{tcb_sa_off} + {sa_tmp_esp}], esp
+    mov gs:[{tcb_sa_off} + {sa_tmp_eax}], eax
+    mov gs:[{tcb_sa_off} + {sa_tmp_edx}], edx
+    mov gs:[{tcb_sa_off} + {sa_tmp_ecx}], ecx
+1:
+    // Read standard signal word - first for this thread
+    mov edx, gs:[{tcb_sc_off} + {sc_word} + 4]
+    mov eax, gs:[{tcb_sc_off} + {sc_word}]
+    and eax, edx
+    bsf eax, eax
+    jnz 9f
+
+    mov ecx, gs:[{tcb_sa_off} + {sa_pctl}]
+
+    // Read standard signal word - for the process
+    mov eax, [ecx + {pctl_pending}]
+    and eax, edx
+    bsf eax, eax
+    jz 3f
+
+    // Read si_pid and si_uid, atomically.
+    movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
+    movq mm0, [ecx + {pctl_sender_infos} + eax * 8]
+    movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
+    movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
+
+    // Try clearing the pending bit, otherwise retry if another thread did that first
+    lock btr [ecx + {pctl_pending}], eax
+    jnc 1b
+    jmp 2f
+3:
+    // Read realtime thread and process signal word together
+    mov edx, [ecx + {pctl_pending} + 4]
+    mov eax, gs:[{tcb_sc_off} + {sc_word} + 8]
+    or eax, edx
+    and eax, gs:[{tcb_sc_off} + {sc_word} + 12]
+    jz 7f // spurious signal
+    bsf eax, eax
+
+    // If thread was specifically targeted, send the signal to it first.
+    bt edx, eax
+    jc 8f
+
+    mov edx, ebx
+    lea ecx, [eax+32]
+    mov eax, {SYS_SIGDEQUEUE}
+    mov edx, gs:[0]
+    add edx, {tcb_sa_off} + {sa_tmp_rt_inf}
+    int 0x80
+    mov ebx, edx
+    test eax, eax
+    jnz 1b
+
+    mov eax, ecx
+    jmp 2f
+8:
+    add eax, 32
+9:
+    // Read si_pid and si_uid, atomically.
+    movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
+    movq mm0, gs:[{tcb_sc_off} + {sc_sender_infos} + eax * 8]
+    movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
+    movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
+    mov edx, eax
+    shr edx, 5
+    mov ecx, eax
+    and ecx, 31
+    lock btr gs:[{tcb_sc_off} + {sc_word} + edx * 8], ecx
+
+    add eax, 64
+2:
+    and esp, -{STACK_ALIGN}
+
+    mov edx, eax
+    add edx, edx
+    bt dword ptr [{pctl} + {pctl_actions} + edx * 8 + 4], 28
+    jnc 4f
+
+    mov edx, gs:[{tcb_sa_off} + {sa_altstack_top}]
+    cmp esp, edx
+    ja 3f
+
+    cmp esp, gs:[{tcb_sa_off} + {sa_altstack_bottom}]
+    jnbe 4f
+3:
+    mov esp, edx
+4:
+    // Now that we have a stack, we can finally start populating the signal stack.
+    push dword ptr gs:[{tcb_sa_off} + {sa_tmp_esp}]
+    push dword ptr gs:[{tcb_sc_off} + {sc_saved_eip}]
+    push dword ptr gs:[{tcb_sc_off} + {sc_saved_eflags}]
+
+    push dword ptr gs:[{tcb_sa_off} + {sa_tmp_edx}]
+    push dword ptr gs:[{tcb_sa_off} + {sa_tmp_ecx}]
+    push dword ptr gs:[{tcb_sa_off} + {sa_tmp_eax}]
+    push ebx
+    push edi
+    push esi
+    push ebp
+
+    sub esp, 2 * 4 + 29 * 16
+    fxsave [esp]
+
+    mov [esp - 4], eax
+    sub esp, 48
+
+    mov ecx, esp
+    call {inner}
+
+    fxrstor [esp + 48]
+    add esp, 48 + 29 * 16 + 2 * 4
+
+    pop ebp
+    pop esi
+    pop edi
+    pop ebx
+    pop eax
+    pop ecx
+    pop edx
+
+    popfd
+    pop dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
+
+    .globl __relibc_internal_sigentry_crit_first
+__relibc_internal_sigentry_crit_first:
+    pop esp
+
+    .globl __relibc_internal_sigentry_crit_second
+__relibc_internal_sigentry_crit_second:
+    jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
+7:
+    mov eax, gs:[0]
+    lea esp, [eax + {tcb_sc_off} + {sc_saved_eflags}]
+    popfd
+
+    mov esp, gs:[{tcb_sa_off} + {sa_tmp_esp}]
+
+    mov eax, gs:[{tcb_sc_off} + {sc_saved_eip}]
+    mov gs:[{tcb_sa_off} + {sa_tmp_eip}], eax
+
+    mov eax, gs:[{tcb_sa_off} + {sa_tmp_eax}]
+    mov ecx, gs:[{tcb_sa_off} + {sa_tmp_ecx}]
+    mov edx, gs:[{tcb_sa_off} + {sa_tmp_edx}]
+
+    and dword ptr gs:[{tcb_sc_off} + {sc_control}], ~1
+    .globl __relibc_internal_sigentry_crit_third
+__relibc_internal_sigentry_crit_third:
+    jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
+"] <= [
+    inner = sym inner_fastcall,
+    sa_tmp_eip = const offset_of!(SigArea, tmp_eip),
+    sa_tmp_esp = const offset_of!(SigArea, tmp_esp),
+    sa_tmp_eax = const offset_of!(SigArea, tmp_eax),
+    sa_tmp_ecx = const offset_of!(SigArea, tmp_ecx),
+    sa_tmp_edx = const offset_of!(SigArea, tmp_edx),
+    sa_tmp_mm0 = const offset_of!(SigArea, tmp_mm0),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
+    sa_altstack_top = const offset_of!(SigArea, altstack_top),
+    sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
+    sa_pctl = const offset_of!(SigArea, pctl),
+    sc_control = const offset_of!(Sigcontrol, control_flags),
+    sc_saved_eflags = const offset_of!(Sigcontrol, saved_archdep_reg),
+    sc_saved_eip = const offset_of!(Sigcontrol, saved_ip),
+    sc_word = const offset_of!(Sigcontrol, word),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
+    tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
+    tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
+    pctl_actions = const offset_of!(SigProcControl, actions),
+    pctl_sender_infos = const offset_of!(SigProcControl, sender_infos),
+    pctl_pending = const offset_of!(SigProcControl, pending),
+    pctl = sym PROC_CONTROL_STRUCT,
+    STACK_ALIGN = const 16,
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
+]);
+
+asmfunction!(__relibc_internal_rlct_clone_ret -> usize: ["
+    # Load registers
+    pop eax
+
+    sub esp, 8
+
+    mov DWORD PTR [esp], 0x00001F80
+    # TODO: ldmxcsr [esp]
+    mov WORD PTR [esp], 0x037F
+    fldcw [esp]
+
+    add esp, 8
+
+    # Call entry point
+    call eax
+
+    ret
+"] <= []);
+extern "C" {
+    fn __relibc_internal_sigentry_crit_first();
+    fn __relibc_internal_sigentry_crit_second();
+    fn __relibc_internal_sigentry_crit_third();
+}
+pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) -> PosixStackt {
+    if stack.regs.eip == __relibc_internal_sigentry_crit_first as usize {
+        let stack_ptr = stack.regs.esp as *const usize;
+        stack.regs.esp = stack_ptr.read();
+        stack.regs.eip = stack_ptr.sub(1).read();
+    } else if stack.regs.eip == __relibc_internal_sigentry_crit_second as usize
+        || stack.regs.eip == __relibc_internal_sigentry_crit_third as usize
+    {
+        stack.regs.eip = area.tmp_eip;
+    }
+    PosixStackt {
+        sp: stack.regs.esp as *mut (),
+        size: 0,  // TODO
+        flags: 0, // TODO
+    }
+}
+#[no_mangle]
+pub unsafe fn manually_enter_trampoline() {
+    let c = &crate::Tcb::current().unwrap().os_specific.control;
+    c.control_flags.store(
+        c.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(),
+        Ordering::Release,
+    );
+    c.saved_archdep_reg.set(0); // TODO: Just reset DF on x86?
+
+    core::arch::asm!("
+        call 2f
+        jmp 3f
+    2:
+        pop dword ptr gs:[{tcb_sc_off} + {sc_saved_eip}]
+        jmp __relibc_internal_sigentry
+    3:
+    ",
+        tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
+        sc_saved_eip = const offset_of!(Sigcontrol, saved_ip),
+    );
+}
+/// Get current stack pointer, weak granularity guarantees.
+pub fn current_sp() -> usize {
+    let sp: usize;
+    unsafe {
+        core::arch::asm!("mov {}, esp", out(reg) sp);
+    }
+    sp
+}

rust-toolchain

-nightly-2018-11-07

rust-toolchain.toml

+[toolchain]
+channel = "nightly-2025-01-12"
+components = ["rust-src"]

src/c/stack_chk.c

-#include <stdint.h>
-
-void abort();
-
-uintptr_t __stack_chk_guard = 0xd048c37519fcadfe;
-
-__attribute__((noreturn))
-void __stack_chk_fail(void) {
-	abort();
-}