include/sys/poll.h

+#include <poll.h>

include/sys/user.h

@@ -4,8 +4,10 @@
 #include <arch/x64/user.h>
 #elif defined(__aarch64__)
 #include <arch/aarch64/user.h>
+#elif defined(__riscv) && __riscv_xlen==64
+#include <arch/riscv64/user.h>
 #else
 #error "Unknown architecture"
 #endif
 
-#endif
\ No newline at end of file
+#endif

ld_so/ld_script/aarch64-unknown-redox.ld

@@ -98,25 +98,25 @@ SECTIONS
   .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
   .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
   /* Thread Local Storage sections  */
-  .tdata          :
+  /* .tdata          :
    {
      PROVIDE_HIDDEN (__tdata_start = .);
      *(.tdata .tdata.* .gnu.linkonce.td.*)
    }
-  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } */
   .preinit_array    :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array))
     PROVIDE_HIDDEN (__preinit_array_end = .);
   }
-  .init_array    :
+  /* .init_array    :
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
     KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
     PROVIDE_HIDDEN (__init_array_end = .);
-  }
+  } */
   .fini_array    :
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -241,5 +241,16 @@ SECTIONS
   .debug_macro    0 : { *(.debug_macro) }
   .debug_addr     0 : { *(.debug_addr) }
   .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+  /DISCARD/ : { 
+    *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) 
+    /*
+     * XXX: As of now, ld.so links with relibc which has the main functionality. In the next refactor,
+     * ld.so will be moved out of relibc. So, till that time, we have to discard any sections
+     * that may reference use thread local storage.
+     *
+     * .init_array also depends on TLS and is discarded as we don't need it.
+     */
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    *(.init_array)
+  }
 }

ld_so/ld_script/i686-unknown-redox.ld

@@ -98,25 +98,25 @@ SECTIONS
   .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
   .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
   /* Thread Local Storage sections  */
-  .tdata          :
+  /* .tdata          :
    {
      PROVIDE_HIDDEN (__tdata_start = .);
      *(.tdata .tdata.* .gnu.linkonce.td.*)
    }
-  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } */
   .preinit_array    :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array))
     PROVIDE_HIDDEN (__preinit_array_end = .);
   }
-  .init_array    :
+  /* .init_array    :
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
     KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
     PROVIDE_HIDDEN (__init_array_end = .);
-  }
+  } */
   .fini_array    :
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -241,5 +241,16 @@ SECTIONS
   .debug_macro    0 : { *(.debug_macro) }
   .debug_addr     0 : { *(.debug_addr) }
   .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+  /DISCARD/ : { 
+    *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) 
+    /*
+     * XXX: As of now, ld.so links with relibc which has the main functionality. In the next refactor,
+     * ld.so will be moved out of relibc. So, till that time, we have to discard any sections
+     * that may reference use thread local storage.
+     *
+     * .init_array also depends on TLS and is discarded as we don't need it.
+     */
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    *(.init_array)
+  }
 }

ld_so/ld_script/riscv64gc-unknown-redox.ld

+/* Script for -z combreloc */
+/* Copyright (C) 2014-2020 Free Software Foundation, Inc.
+   Copying and distribution of this script, with or without modification,
+   are permitted in any medium without royalty provided the copyright
+   notice and this notice are preserved.  */
+OUTPUT_FORMAT("elf64-littleriscv", "elf64-littleriscv", "elf64-littleriscv" )
+OUTPUT_ARCH(riscv)
+ENTRY(_start)
+SEARCH_DIR("/riscv64-unknown-redox/lib");
+SEARCH_DIR("/usr/local/lib64");
+SEARCH_DIR("/lib64");
+SEARCH_DIR("/usr/lib64");
+SEARCH_DIR("/usr/local/lib");
+SEARCH_DIR("/lib");
+SEARCH_DIR("/usr/lib");
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x400000)); . = SEGMENT_START("text-segment", 0x20000000) + SIZEOF_HEADERS;
+  .interp         : { *(.interp) }
+  .note.gnu.build-id  : { *(.note.gnu.build-id) }
+  .hash           : { *(.hash) }
+  .gnu.hash       : { *(.gnu.hash) }
+  .dynsym         : { *(.dynsym) }
+  .dynstr         : { *(.dynstr) }
+  .gnu.version    : { *(.gnu.version) }
+  .gnu.version_d  : { *(.gnu.version_d) }
+  .gnu.version_r  : { *(.gnu.version_r) }
+  .rela.dyn       :
+    {
+      *(.rela.init)
+      *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+      *(.rela.fini)
+      *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+      *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+      *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+      *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+      *(.rela.ctors)
+      *(.rela.dtors)
+      *(.rela.got)
+      *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+      *(.rela.ldata .rela.ldata.* .rela.gnu.linkonce.l.*)
+      *(.rela.lbss .rela.lbss.* .rela.gnu.linkonce.lb.*)
+      *(.rela.lrodata .rela.lrodata.* .rela.gnu.linkonce.lr.*)
+      *(.rela.ifunc)
+    }
+  .rela.plt       :
+    {
+      *(.rela.plt)
+      PROVIDE_HIDDEN (__rela_iplt_start = .);
+      *(.rela.iplt)
+      PROVIDE_HIDDEN (__rela_iplt_end = .);
+    }
+  . = ALIGN(CONSTANT (MAXPAGESIZE));
+  .plt            : { *(.plt) *(.iplt) }
+.plt.got        : { *(.plt.got) }
+.plt.sec        : { *(.plt.sec) }
+  .text           :
+  {
+    *(.text.unlikely .text.*_unlikely .text.unlikely.*)
+    *(.text.exit .text.exit.*)
+    *(.text.startup .text.startup.*)
+    *(.text.hot .text.hot.*)
+    *(.text .stub .text.* .gnu.linkonce.t.*)
+    /* .gnu.warning sections are handled specially by elf.em.  */
+    *(.gnu.warning)
+  }
+  PROVIDE (__etext = .);
+  PROVIDE (_etext = .);
+  PROVIDE (etext = .);
+  . = ALIGN(CONSTANT (MAXPAGESIZE));
+  /* Adjust the address for the rodata segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = SEGMENT_START("rodata-segment", ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)));
+  .rodata         : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+  .rodata1        : { *(.rodata1) }
+  .eh_frame_hdr   : { *(.eh_frame_hdr) *(.eh_frame_entry .eh_frame_entry.*) }
+  .eh_frame       : ONLY_IF_RO { KEEP (*(.eh_frame)) *(.eh_frame.*) }
+  .gcc_except_table   : ONLY_IF_RO { *(.gcc_except_table .gcc_except_table.*) }
+  .gnu_extab   : ONLY_IF_RO { *(.gnu_extab*) }
+  /* These sections are generated by the Sun/Oracle C++ compiler.  */
+  .exception_ranges   : ONLY_IF_RO { *(.exception_ranges*) }
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  */
+  . = DATA_SEGMENT_ALIGN (CONSTANT (MAXPAGESIZE), CONSTANT (COMMONPAGESIZE));
+  /* Exception handling  */
+  .eh_frame       : ONLY_IF_RW { KEEP (*(.eh_frame)) *(.eh_frame.*) }
+  .gnu_extab      : ONLY_IF_RW { *(.gnu_extab) }
+  .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
+  .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
+  /* Thread Local Storage sections  */
+  /* .tdata          :
+   {
+     PROVIDE_HIDDEN (__tdata_start = .);
+     *(.tdata .tdata.* .gnu.linkonce.td.*)
+   }
+  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } */
+  .preinit_array    :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  }
+  /* .init_array    :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } */
+  .fini_array    :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  }
+  .ctors          :
+  {
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  }
+  .dtors          :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  }
+  .jcr            : { KEEP (*(.jcr)) }
+  .data.rel.ro : { *(.data.rel.ro.local* .gnu.linkonce.d.rel.ro.local.*) *(.data.rel.ro .data.rel.ro.* .gnu.linkonce.d.rel.ro.*) }
+  .dynamic        : { *(.dynamic) }
+  .got            : { *(.got) *(.igot) }
+  . = DATA_SEGMENT_RELRO_END (SIZEOF (.got.plt) >= 24 ? 24 : 0, .);
+  .got.plt        : { *(.got.plt) *(.igot.plt) }
+  .data           :
+  {
+    *(.data .data.* .gnu.linkonce.d.*)
+    SORT(CONSTRUCTORS)
+  }
+  .data1          : { *(.data1) }
+  _edata = .; PROVIDE (edata = .);
+  . = .;
+  __bss_start = .;
+  .bss            :
+  {
+   *(.dynbss)
+   *(.bss .bss.* .gnu.linkonce.b.*)
+   *(COMMON)
+   /* Align here to ensure that the .bss section occupies space up to
+      _end.  Align after .bss to ensure correct alignment even if the
+      .bss section disappears because there are no input sections.
+      FIXME: Why do we need it? When there is no .bss section, we do not
+      pad the .data section.  */
+   . = ALIGN(. != 0 ? 64 / 8 : 1);
+  }
+  .lbss   :
+  {
+    *(.dynlbss)
+    *(.lbss .lbss.* .gnu.linkonce.lb.*)
+    *(LARGE_COMMON)
+  }
+  . = ALIGN(64 / 8);
+  . = SEGMENT_START("ldata-segment", .);
+  .lrodata   ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)) :
+  {
+    *(.lrodata .lrodata.* .gnu.linkonce.lr.*)
+  }
+  .ldata   ALIGN(CONSTANT (MAXPAGESIZE)) + (. & (CONSTANT (MAXPAGESIZE) - 1)) :
+  {
+    *(.ldata .ldata.* .gnu.linkonce.l.*)
+    . = ALIGN(. != 0 ? 64 / 8 : 1);
+  }
+  . = ALIGN(64 / 8);
+  _end = .; PROVIDE (end = .);
+  . = DATA_SEGMENT_END (.);
+  /* Stabs debugging sections.  */
+  .stab          0 : { *(.stab) }
+  .stabstr       0 : { *(.stabstr) }
+  .stab.excl     0 : { *(.stab.excl) }
+  .stab.exclstr  0 : { *(.stab.exclstr) }
+  .stab.index    0 : { *(.stab.index) }
+  .stab.indexstr 0 : { *(.stab.indexstr) }
+  .comment       0 : { *(.comment) }
+  .gnu.build.attributes : { *(.gnu.build.attributes .gnu.build.attributes.*) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line .debug_line.* .debug_line_end) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  /* DWARF 3 */
+  .debug_pubtypes 0 : { *(.debug_pubtypes) }
+  .debug_ranges   0 : { *(.debug_ranges) }
+  /* DWARF Extension.  */
+  .debug_macro    0 : { *(.debug_macro) }
+  .debug_addr     0 : { *(.debug_addr) }
+  .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
+  /DISCARD/ : { 
+    *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) 
+    /*
+     * XXX: As of now, ld.so links with relibc which has the main functionality. In the next refactor,
+     * ld.so will be moved out of relibc. So, till that time, we have to discard any sections
+     * that may reference use thread local storage.
+     *
+     * .init_array also depends on TLS and is discarded as we don't need it.
+     */
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    *(.init_array)
+  }
+}

ld_so/ld_script/x86_64-unknown-linux-gnu.ld

@@ -101,25 +101,25 @@ SECTIONS
   .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
   .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
   /* Thread Local Storage sections  */
-  .tdata          :
+  /* .tdata          : ALIGN(4K)
    {
      PROVIDE_HIDDEN (__tdata_start = .);
      *(.tdata .tdata.* .gnu.linkonce.td.*)
    }
-  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } */
   .preinit_array    :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array))
     PROVIDE_HIDDEN (__preinit_array_end = .);
   }
-  .init_array    :
+  /* .init_array    :
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
     KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
     PROVIDE_HIDDEN (__init_array_end = .);
-  }
+  } */
   .fini_array    :
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -244,5 +244,16 @@ SECTIONS
   .debug_macro    0 : { *(.debug_macro) }
   .debug_addr     0 : { *(.debug_addr) }
   .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+  /DISCARD/ : { 
+    *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) 
+    /*
+     * XXX: As of now, ld.so links with relibc which has the main functionality. In the next refactor,
+     * ld.so will be moved out of relibc. So, till that time, we have to discard any sections
+     * that may reference use thread local storage.
+     *
+     * .init_array also depends on TLS and is discarded as we don't need it.
+     */
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    *(.init_array)
+  }
 }

ld_so/ld_script/x86_64-unknown-redox.ld

@@ -98,25 +98,25 @@ SECTIONS
   .gcc_except_table   : ONLY_IF_RW { *(.gcc_except_table .gcc_except_table.*) }
   .exception_ranges   : ONLY_IF_RW { *(.exception_ranges*) }
   /* Thread Local Storage sections  */
-  .tdata          :
+  /* .tdata          : ALIGN(4K)
    {
      PROVIDE_HIDDEN (__tdata_start = .);
      *(.tdata .tdata.* .gnu.linkonce.td.*)
    }
-  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+  .tbss           : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) } */
   .preinit_array    :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array))
     PROVIDE_HIDDEN (__preinit_array_end = .);
   }
-  .init_array    :
+  /* .init_array    :
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
     KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
     PROVIDE_HIDDEN (__init_array_end = .);
-  }
+  } */
   .fini_array    :
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
@@ -241,5 +241,16 @@ SECTIONS
   .debug_macro    0 : { *(.debug_macro) }
   .debug_addr     0 : { *(.debug_addr) }
   .gnu.attributes 0 : { KEEP (*(.gnu.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) }
+  /DISCARD/ : { 
+    *(.note.GNU-stack) *(.gnu_debuglink) *(.gnu.lto_*) 
+    /*
+     * XXX: As of now, ld.so links with relibc which has the main functionality. In the next refactor,
+     * ld.so will be moved out of relibc. So, till that time, we have to discard any sections
+     * that may reference use thread local storage.
+     *
+     * .init_array also depends on TLS and is discarded as we don't need it.
+     */
+    *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon)
+    *(.init_array)
+  }
 }

ld_so/src/lib.rs

@@ -62,6 +62,17 @@ _start:
 "
 );
 
+#[cfg(target_arch = "riscv64")]
+global_asm!(
+    "
+.globl _start
+_start:
+    mv a0, sp
+    jal relibc_ld_so_start
+    unimp
+"
+);
+
 #[no_mangle]
 pub unsafe extern "C" fn main(_argc: isize, _argv: *const *const i8) -> usize {
     // LD
@@ -70,7 +81,7 @@ pub unsafe extern "C" fn main(_argc: isize, _argv: *const *const i8) -> usize {
 
 #[linkage = "weak"]
 #[no_mangle]
-extern "C" fn relibc_panic(pi: &::core::panic::PanicInfo) -> ! {
+extern "C" fn relibc_panic(_pi: &::core::panic::PanicInfo) -> ! {
     loop {}
 }
 

openlibm @ 3cfad148

-Subproject commit e2da0dafd3f326c9beb5d85734f832b98830ef9e
+Subproject commit 3cfad148058a1dda6346821c9ca6b4c10d726543

posix-regex @ f42f2151

-Subproject commit 0d996efe5cfe7ce181af35d8817ac4deae644d4a
+Subproject commit f42f21519dc900a19318ea499354d09e0491540f

redox-rt/Cargo.toml

@@ -12,6 +12,6 @@ description = "Libc-independent runtime for Redox"
 bitflags = "2"
 goblin = { version = "0.7", default-features = false, features = ["elf32", "elf64", "endian_fd"] }
 plain = "0.2"
-redox_syscall = "0.5.1"
+redox_syscall = "0.5.8"
 
 generic-rt = { path = "../generic-rt" }

redox-rt/src/arch/aarch64.rs

-use core::mem::offset_of;
+use core::{mem::offset_of, ptr::NonNull};
 
-use syscall::data::*;
-use syscall::error::*;
+use syscall::{data::*, error::*};
 
-use crate::proc::{fork_inner, FdGuard};
-use crate::signal::SigStack;
-use crate::signal::{inner_c, RtSigarea, PROC_CONTROL_STRUCT};
-use crate::Tcb;
+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{inner_c, PosixStackt, RtSigarea, SigStack, PROC_CONTROL_STRUCT},
+    RtTcb, Tcb,
+};
 
 // Setup a stack starting from the very end of the address space, and then growing downwards.
 pub(crate) const STACK_TOP: usize = 1 << 47;
@@ -19,10 +19,15 @@ pub struct SigArea {
     pub altstack_bottom: usize,
     pub tmp_x1_x2: [usize; 2],
     pub tmp_x3_x4: [usize; 2],
+    pub tmp_x5_x6: [usize; 2],
     pub tmp_sp: usize,
     pub onstack: u64,
     pub disable_signals_depth: u64,
     pub pctl: usize, // TODO: remove
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
 }
 #[repr(C)]
 #[derive(Debug, Default)]
@@ -98,7 +103,11 @@ unsafe extern "C" fn fork_impl(initial_rsp: *mut usize) -> usize {
 
 unsafe extern "C" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
     let _ = syscall::close(cur_filetable_fd);
-    let _ = syscall::close(new_pid_fd);
+    // TODO: Currently pidfd == threadfd, but this will not be the case later.
+    RtTcb::current()
+        .thr_fd
+        .get()
+        .write(Some(FdGuard::new(new_pid_fd)));
 }
 
 asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
@@ -145,75 +154,202 @@ asmfunction!(__relibc_internal_fork_ret: ["
     ret
 "] <= [child_hook = sym child_hook]);
 
+// https://devblogs.microsoft.com/oldnewthing/20220811-00/?p=106963
 asmfunction!(__relibc_internal_sigentry: ["
-    // old pc and x0 are saved in the sigcontrol struct
+    // Clear any active reservation.
+    clrex
+
+    // The old pc and x0 are saved in the sigcontrol struct.
     mrs x0, tpidr_el0 // ABI ptr
     ldr x0, [x0] // TCB ptr
 
-    // save x1-x3 and sp
+    // Save x1-x6 and sp
     stp x1, x2, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
     stp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
+    stp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
     mov x1, sp
     str x1, [x0, #{tcb_sa_off} + {sa_tmp_sp}]
 
-    sub x1, x1, 128
-    and x1, x1, -16
-    mov sp, x1
+    ldr x6, [x0, #{tcb_sa_off} + {sa_pctl}]
+1:
+    // Load x1 with the thread's bits
+    add x5, x0, #{tcb_sc_off} + {sc_word}
+    ldaxr x1, [x5]
+
+    // First check if there are standard thread signals,
+    and x4, x1, x1, lsr #32 // x4 := x1 & (x1 >> 32)
+    cbnz x4, 3f // jump if x4 != 0
+    clrex
+
+    // and if not, load process pending bitset.
+    add x5, x6, #{pctl_pending}
+    ldaxr x2, [x5]
+
+    // Check if there are standard proc signals:
+    lsr x3, x1, #32 // mask
+    and w3, w2, w3 // pending unblocked proc
+    cbz w3, 4f // skip 'fetch_andn' step if zero
+
+    // If there was one, find which one, and try clearing the bit (last value in x3, addr in x6)
+    // this picks the MSB rather than the LSB, unlike x86. POSIX does not require any specific
+    // ordering though.
+    clz w3, w3
+    mov w4, #31
+    sub w3, w4, w3
+    // x3 now contains the sig_idx
+
+    mov x4, #1
+    lsl x4, x4, x3 // bit to remove
+
+    sub x4, x2, x4 // bit was certainly set, so sub is allowed
+    // x4 is now the new mask to be set
+    add x5, x6, #{pctl_pending}
+
+    add x2, x5, #{pctl_sender_infos}
+    add x2, x2, w3, uxtb 3
+    ldar x2, [x2]
+
+    // Try clearing the bit, retrying on failure.
+    stxr w1, x4, [x5] // try setting pending set to x4, set w1 := 0 on success
+    cbnz w1, 1b // retry everything if this fails
+    mov x1, x3
+    b 2f
+4:
+    // Check for realtime signals, thread/proc.
+    clrex
+
+    // Load the pending set again. TODO: optimize this?
+    add x1, x6, #{pctl_pending}
+    ldaxr x2, [x1]
+    lsr x2, x2, #32
+
+    add x5, x0, #{tcb_sc_off} + {sc_word} + 8
+    ldar x1, [x5]
+
+    orr x2, x1, x2
+    and x2, x2, x2, lsr #32
+    cbz x2, 7f
+
+    rbit x3, x2
+    clz x3, x3
+    mov x4, #31
+    sub x2, x4, x3
+    // x2 now contains sig_idx - 32
+
+    // If realtime signal was directed at thread, handle it as an idempotent signal.
+    lsr x3, x1, x2
+    tbnz x3, #0, 5f
+
+    mov x5, x0
+    mov x4, x8
+    mov x8, #{SYS_SIGDEQUEUE}
+    mov x0, x1
+    add x1, x0, #{tcb_sa_off} + {sa_tmp_rt_inf}
+    svc 0
+    mov x0, x5
+    mov x8, x4
+    cbnz x0, 1b
+
+    b 2f
+5:
+    // A realtime signal was sent to this thread, try clearing its bit.
+    // x3 contains last rt signal word, x2 contains rt_idx
+    clrex
+
+    // Calculate the absolute sig_idx
+    add x1, x3, 32
+
+    // Load si_pid and si_uid
+    add x2, x0, #{tcb_sc_off} + {sc_sender_infos}
+    add x2, x2, w1, uxtb #3
+    ldar x2, [x2]
+
+    add x3, x0, #{tcb_sc_off} + {sc_word} + 8
+    ldxr x2, [x3]
+
+    // Calculate new mask
+    mov x4, #1
+    lsl x4, x4, x2
+    sub x2, x2, x4 // remove bit
+
+    stxr w5, x2, [x3]
+    cbnz w5, 1b
+    str x2, [x0, #{tcb_sa_off} + {sa_tmp_id_inf}]
+    b 2f
+3:
+    // A standard signal was sent to this thread, try clearing its bit.
+    clz x1, x1
+    mov x2, #31
+    sub x1, x2, x1
 
-    ldr x3, [x0, #{tcb_sa_off} + {sa_pctl}]
+    // Load si_pid and si_uid
+    add x2, x0, #{tcb_sc_off} + {sc_sender_infos}
+    add x2, x2, w1, uxtb #3
+    ldar x2, [x2]
 
-    // load x1 and x2 with each word (tearing between x1 and x2 can occur)
-    // acquire ordering
-    add x2, x0, #{tcb_sc_off} + {sc_word}
-    ldaxp x1, x2, [x2]
+    // Clear bit from mask
+    mov x3, #1
+    lsl x3, x3, x1
+    sub x4, x4, x3
 
-    // reduce them by ANDing the upper and lower 32 bits
-    and x1, x1, x1, lsr #32 // put result in lo half
-    and x2, x2, x2, lsl #32 // put result in hi half
-    orr x1, x1, x2 // combine them into the set of pending unblocked
+    // Try updating the mask
+    stxr w3, x1, [x5]
+    cbnz w3, 1b
 
-    // count trailing zeroes, to find signal bit
-    rbit x1, x1
-    clz x1, x1
-    mov x2, #32
-    sub x1, x2, x1
-
-    // TODO: NOT ATOMIC!
+    str x2, [x0, #{tcb_sa_off} + {sa_tmp_id_inf}]
+2:
+    ldr x3, [x0, #{tcb_sa_off} + {sa_pctl}]
+    add x2, x2, {pctl_actions}
     add x2, x3, w1, uxtb #4 // actions_base + sig_idx * sizeof Action
+    // TODO: NOT ATOMIC (tearing allowed between regs)!
     ldxp x2, x3, [x2]
+    clrex
+
+    // Calculate new sp wrt redzone and alignment
+    mov x4, sp
+    sub x4, x4, {REDZONE_SIZE}
+    and x4, x4, -{STACK_ALIGN}
+    mov sp, x4
 
     // skip sigaltstack step if SA_ONSTACK is clear
-    // tbz x2, #57, 2f
-2:
+    // tbz x2, #{SA_ONSTACK_BIT}, 2f
+
     ldr x2, [x0, #{tcb_sc_off} + {sc_saved_pc}]
     ldr x3, [x0, #{tcb_sc_off} + {sc_saved_x0}]
-    stp x2, x3, [sp], #-16
+    stp x2, x3, [sp, #-16]!
 
     ldr x2, [x0, #{tcb_sa_off} + {sa_tmp_sp}]
     mrs x3, nzcv
-    stp x2, x3, [sp], #-16
+    stp x2, x3, [sp, #-16]!
 
     ldp x2, x3, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
-    stp x2, x3, [sp], #-16
+    stp x2, x3, [sp, #-16]!
     ldp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
-    stp x4, x3, [sp], #-16
-    stp x6, x5, [sp], #-16
-    stp x8, x7, [sp], #-16
-    stp x10, x9, [sp], #-16
-    stp x12, x11, [sp], #-16
-    stp x14, x13, [sp], #-16
-    stp x16, x15, [sp], #-16
-    stp x18, x17, [sp], #-16
-    stp x20, x19, [sp], #-16
-    stp x22, x21, [sp], #-16
-    stp x24, x23, [sp], #-16
-    stp x26, x25, [sp], #-16
-    stp x28, x27, [sp], #-16
-    stp x30, x29, [sp], #-16
+    stp x4, x3, [sp, #-16]!
+    ldp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
+    stp x6, x5, [sp, #-16]!
+
+    stp x8, x7, [sp, #-16]!
+    stp x10, x9, [sp, #-16]!
+    stp x12, x11, [sp, #-16]!
+    stp x14, x13, [sp, #-16]!
+    stp x16, x15, [sp, #-16]!
+    stp x18, x17, [sp, #-16]!
+    stp x20, x19, [sp, #-16]!
+    stp x22, x21, [sp, #-16]!
+    stp x24, x23, [sp, #-16]!
+    stp x26, x25, [sp, #-16]!
+    stp x28, x27, [sp, #-16]!
+    stp x30, x29, [sp, #-16]!
+
+    str w1, [sp, #-4]
+    sub sp, sp, #64
 
     mov x0, sp
     bl {inner}
 
+    add sp, sp, #64
+
     ldp x30, x29, [sp], #16
     ldp x28, x27, [sp], #16
     ldp x26, x25, [sp], #16
@@ -229,28 +365,56 @@ asmfunction!(__relibc_internal_sigentry: ["
     ldp x6, x5, [sp], #16
     ldp x4, x3, [sp], #16
     ldp x2, x1, [sp], #16
+
     ldr x0, [sp, #8]
     msr nzcv, x0
 
+8:
     // x18 is reserved by ABI as 'platform register', so clobbering it should be safe.
     mov x18, sp
-    ldr x0, [sp], #16
+    ldr x0, [x18]
     mov sp, x0
-    mov x0, x18
 
-    ldp x18, x0, [x0]
+    ldp x18, x0, [x18, #16]
+    br x18
+7:
+    // Spurious signal, i.e. all bitsets were 0 at the time they were checked
+    clrex
+
+    ldr x1, [x0, #{tcb_sc_off} + {sc_flags}]
+    and x1, x1, ~1
+    str x1, [x0, #{tcb_sc_off} + {sc_flags}]
+
+    ldp x1, x2, [x0, #{tcb_sa_off} + {sa_tmp_x1_x2}]
+    ldp x3, x4, [x0, #{tcb_sa_off} + {sa_tmp_x3_x4}]
+    ldp x5, x6, [x0, #{tcb_sa_off} + {sa_tmp_x5_x6}]
+    ldr x18, [x0, #{tcb_sc_off} + {sc_saved_pc}]
+    ldr x0, [x0, #{tcb_sc_off} + {sc_saved_x0}]
     br x18
 "] <= [
+    pctl_pending = const (offset_of!(SigProcControl, pending)),
+    pctl_actions = const (offset_of!(SigProcControl, actions)),
+    pctl_sender_infos = const (offset_of!(SigProcControl, sender_infos)),
     tcb_sc_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control)),
     tcb_sa_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch)),
     sa_tmp_x1_x2 = const offset_of!(SigArea, tmp_x1_x2),
     sa_tmp_x3_x4 = const offset_of!(SigArea, tmp_x3_x4),
+    sa_tmp_x5_x6 = const offset_of!(SigArea, tmp_x5_x6),
     sa_tmp_sp = const offset_of!(SigArea, tmp_sp),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
     sa_pctl = const offset_of!(SigArea, pctl),
     sc_saved_pc = const offset_of!(Sigcontrol, saved_ip),
     sc_saved_x0 = const offset_of!(Sigcontrol, saved_archdep_reg),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
     sc_word = const offset_of!(Sigcontrol, word),
+    sc_flags = const offset_of!(Sigcontrol, control_flags),
     inner = sym inner_c,
+
+    SA_ONSTACK_BIT = const 58, // (1 << 58) >> 32 = 0x0400_0000
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
+    STACK_ALIGN = const 16,
+    REDZONE_SIZE = const 128,
 ]);
 
 asmfunction!(__relibc_internal_rlct_clone_ret: ["
@@ -289,4 +453,10 @@ pub unsafe fn manually_enter_trampoline() {
     ", inout("x0") ip_location => _, out("lr") _);
 }
 
-pub unsafe fn arch_pre(stack: &mut SigStack, os: &mut SigArea) {}
+pub unsafe fn arch_pre(stack: &mut SigStack, os: &mut SigArea) -> PosixStackt {
+    PosixStackt {
+        sp: core::ptr::null_mut(), // TODO
+        size: 0,                   // TODO
+        flags: 0,                  // TODO
+    }
+}

redox-rt/src/arch/i686.rs

-use core::mem::offset_of;
-use core::sync::atomic::Ordering;
+use core::{mem::offset_of, ptr::NonNull, sync::atomic::Ordering};
 
 use syscall::*;
 
-use crate::proc::{fork_inner, FdGuard};
-use crate::signal::{inner_fastcall, PROC_CONTROL_STRUCT, RtSigarea, SigStack};
+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{inner_fastcall, PosixStackt, RtSigarea, SigStack, PROC_CONTROL_STRUCT},
+    RtTcb,
+};
 
 // Setup a stack starting from the very end of the address space, and then growing downwards.
 pub(crate) const STACK_TOP: usize = 1 << 31;
@@ -18,8 +20,15 @@ pub struct SigArea {
     pub tmp_eip: usize,
     pub tmp_esp: usize,
     pub tmp_eax: usize,
+    pub tmp_ecx: usize,
     pub tmp_edx: usize,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
+    pub tmp_mm0: u64,
+    pub pctl: usize, // TODO: reference pctl directly
     pub disable_signals_depth: u64,
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
 }
 #[derive(Debug, Default)]
 #[repr(C, align(16))]
@@ -38,8 +47,8 @@ pub struct ArchIntRegs {
     pub edx: usize, // avail +32
 
     pub eflags: usize, // avail +36
-    pub eip: usize, // avail +40
-    pub esp: usize, // avail +44
+    pub eip: usize,    // avail +40
+    pub esp: usize,    // avail +44
 }
 
 /// Deactive TLS, used before exec() on Redox to not trick target executable into thinking TLS
@@ -76,7 +85,7 @@ unsafe extern "cdecl" fn fork_impl(initial_rsp: *mut usize) -> usize {
 
 unsafe extern "cdecl" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
     let _ = syscall::close(cur_filetable_fd);
-    let _ = syscall::close(new_pid_fd);
+    crate::child_hook_common(FdGuard::new(new_pid_fd));
 }
 
 asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
@@ -127,28 +136,79 @@ asmfunction!(__relibc_internal_sigentry: ["
     mov gs:[{tcb_sa_off} + {sa_tmp_esp}], esp
     mov gs:[{tcb_sa_off} + {sa_tmp_eax}], eax
     mov gs:[{tcb_sa_off} + {sa_tmp_edx}], edx
+    mov gs:[{tcb_sa_off} + {sa_tmp_ecx}], ecx
+1:
+    // Read standard signal word - first for this thread
+    mov edx, gs:[{tcb_sc_off} + {sc_word} + 4]
+    mov eax, gs:[{tcb_sc_off} + {sc_word}]
+    and eax, edx
+    bsf eax, eax
+    jnz 9f
 
-    // Read pending half of first signal. This can be done nonatomically wrt the mask bits, since
-    // only this thread is allowed to modify the latter.
+    mov ecx, gs:[{tcb_sa_off} + {sa_pctl}]
 
-    // Read first signal word
-    mov eax, gs:[{tcb_sc_off} + {sc_word}]
-    and eax, gs:[{tcb_sc_off} + {sc_word} + 4]
+    // Read standard signal word - for the process
+    mov eax, [ecx + {pctl_pending}]
+    and eax, edx
     bsf eax, eax
-    jnz 2f
+    jz 3f
 
-    // Read second signal word
+    // Read si_pid and si_uid, atomically.
+    movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
+    movq mm0, [ecx + {pctl_sender_infos} + eax * 8]
+    movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
+    movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
+
+    // Try clearing the pending bit, otherwise retry if another thread did that first
+    lock btr [ecx + {pctl_pending}], eax
+    jnc 1b
+    jmp 2f
+3:
+    // Read realtime thread and process signal word together
+    mov edx, [ecx + {pctl_pending} + 4]
     mov eax, gs:[{tcb_sc_off} + {sc_word} + 8]
+    or eax, edx
     and eax, gs:[{tcb_sc_off} + {sc_word} + 12]
+    jz 7f // spurious signal
     bsf eax, eax
-    jz 7f
+
+    // If thread was specifically targeted, send the signal to it first.
+    bt edx, eax
+    jc 8f
+
+    mov edx, ebx
+    lea ecx, [eax+32]
+    mov eax, {SYS_SIGDEQUEUE}
+    mov edx, gs:[0]
+    add edx, {tcb_sa_off} + {sa_tmp_rt_inf}
+    int 0x80
+    mov ebx, edx
+    test eax, eax
+    jnz 1b
+
+    mov eax, ecx
+    jmp 2f
+8:
     add eax, 32
+9:
+    // Read si_pid and si_uid, atomically.
+    movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
+    movq mm0, gs:[{tcb_sc_off} + {sc_sender_infos} + eax * 8]
+    movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
+    movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
+    mov edx, eax
+    shr edx, 5
+    mov ecx, eax
+    and ecx, 31
+    lock btr gs:[{tcb_sc_off} + {sc_word} + edx * 8], ecx
+
+    add eax, 64
 2:
     and esp, -{STACK_ALIGN}
 
     mov edx, eax
     add edx, edx
-    bt dword ptr [{pctl} + {pctl_off_actions} + edx * 8 + 4], 28
+    bt dword ptr [{pctl} + {pctl_actions} + edx * 8 + 4], 28
     jnc 4f
 
     mov edx, gs:[{tcb_sa_off} + {sa_altstack_top}]
@@ -166,7 +226,7 @@ asmfunction!(__relibc_internal_sigentry: ["
     push dword ptr gs:[{tcb_sc_off} + {sc_saved_eflags}]
 
     push dword ptr gs:[{tcb_sa_off} + {sa_tmp_edx}]
-    push ecx
+    push dword ptr gs:[{tcb_sa_off} + {sa_tmp_ecx}]
     push dword ptr gs:[{tcb_sa_off} + {sa_tmp_eax}]
     push ebx
     push edi
@@ -176,14 +236,14 @@ asmfunction!(__relibc_internal_sigentry: ["
     sub esp, 2 * 4 + 29 * 16
     fxsave [esp]
 
-    push eax
-    sub esp, 3 * 4
+    mov [esp - 4], eax
+    sub esp, 48
 
     mov ecx, esp
     call {inner}
 
-    fxrstor [esp + 16]
-    add esp, 16 + 29 * 16 + 2 * 4
+    fxrstor [esp + 48]
+    add esp, 48 + 29 * 16 + 2 * 4
 
     pop ebp
     pop esi
@@ -204,23 +264,49 @@ __relibc_internal_sigentry_crit_first:
 __relibc_internal_sigentry_crit_second:
     jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
 7:
-    ud2
+    mov eax, gs:[0]
+    lea esp, [eax + {tcb_sc_off} + {sc_saved_eflags}]
+    popfd
+
+    mov esp, gs:[{tcb_sa_off} + {sa_tmp_esp}]
+
+    mov eax, gs:[{tcb_sc_off} + {sc_saved_eip}]
+    mov gs:[{tcb_sa_off} + {sa_tmp_eip}], eax
+
+    mov eax, gs:[{tcb_sa_off} + {sa_tmp_eax}]
+    mov ecx, gs:[{tcb_sa_off} + {sa_tmp_ecx}]
+    mov edx, gs:[{tcb_sa_off} + {sa_tmp_edx}]
+
+    and dword ptr gs:[{tcb_sc_off} + {sc_control}], ~1
+    .globl __relibc_internal_sigentry_crit_third
+__relibc_internal_sigentry_crit_third:
+    jmp dword ptr gs:[{tcb_sa_off} + {sa_tmp_eip}]
 "] <= [
     inner = sym inner_fastcall,
     sa_tmp_eip = const offset_of!(SigArea, tmp_eip),
     sa_tmp_esp = const offset_of!(SigArea, tmp_esp),
     sa_tmp_eax = const offset_of!(SigArea, tmp_eax),
+    sa_tmp_ecx = const offset_of!(SigArea, tmp_ecx),
     sa_tmp_edx = const offset_of!(SigArea, tmp_edx),
+    sa_tmp_mm0 = const offset_of!(SigArea, tmp_mm0),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
     sa_altstack_top = const offset_of!(SigArea, altstack_top),
     sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
+    sa_pctl = const offset_of!(SigArea, pctl),
+    sc_control = const offset_of!(Sigcontrol, control_flags),
     sc_saved_eflags = const offset_of!(Sigcontrol, saved_archdep_reg),
     sc_saved_eip = const offset_of!(Sigcontrol, saved_ip),
     sc_word = const offset_of!(Sigcontrol, word),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
     tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
     tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
-    pctl_off_actions = const offset_of!(SigProcControl, actions),
+    pctl_actions = const offset_of!(SigProcControl, actions),
+    pctl_sender_infos = const offset_of!(SigProcControl, sender_infos),
+    pctl_pending = const offset_of!(SigProcControl, pending),
     pctl = sym PROC_CONTROL_STRUCT,
     STACK_ALIGN = const 16,
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
 ]);
 
 asmfunction!(__relibc_internal_rlct_clone_ret -> usize: ["
@@ -244,19 +330,31 @@ asmfunction!(__relibc_internal_rlct_clone_ret -> usize: ["
 extern "C" {
     fn __relibc_internal_sigentry_crit_first();
     fn __relibc_internal_sigentry_crit_second();
+    fn __relibc_internal_sigentry_crit_third();
 }
-pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) {
+pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) -> PosixStackt {
     if stack.regs.eip == __relibc_internal_sigentry_crit_first as usize {
         let stack_ptr = stack.regs.esp as *const usize;
         stack.regs.esp = stack_ptr.read();
         stack.regs.eip = stack_ptr.sub(1).read();
-    } else if stack.regs.eip == __relibc_internal_sigentry_crit_second as usize {
+    } else if stack.regs.eip == __relibc_internal_sigentry_crit_second as usize
+        || stack.regs.eip == __relibc_internal_sigentry_crit_third as usize
+    {
         stack.regs.eip = area.tmp_eip;
     }
+    PosixStackt {
+        sp: stack.regs.esp as *mut (),
+        size: 0,  // TODO
+        flags: 0, // TODO
+    }
 }
+#[no_mangle]
 pub unsafe fn manually_enter_trampoline() {
     let c = &crate::Tcb::current().unwrap().os_specific.control;
-    c.control_flags.store(c.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(), Ordering::Release);
+    c.control_flags.store(
+        c.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(),
+        Ordering::Release,
+    );
     c.saved_archdep_reg.set(0); // TODO: Just reset DF on x86?
 
     core::arch::asm!("

redox-rt/src/arch/mod.rs

@@ -12,3 +12,8 @@ pub mod i686;
 pub use self::x86_64::*;
 #[cfg(target_arch = "x86_64")]
 pub mod x86_64;
+
+#[cfg(target_arch = "riscv64")]
+pub use self::riscv64::*;
+#[cfg(target_arch = "riscv64")]
+pub mod riscv64;

redox-rt/src/arch/riscv64.rs

+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{get_sigaltstack, inner_c, PosixStackt, RtSigarea, SigStack},
+    RtTcb, Tcb,
+};
+use core::{mem::offset_of, ptr::NonNull, sync::atomic::Ordering};
+use syscall::{data::*, error::*};
+
+// Setup a stack starting from the very end of the address space, and then growing downwards.
+pub(crate) const STACK_TOP: usize = 1 << 47;
+pub(crate) const STACK_SIZE: usize = 1024 * 1024;
+
+#[derive(Debug, Default)]
+#[repr(C)]
+pub struct SigArea {
+    pub tmp_sp: u64,
+    pub tmp_t1: u64,
+    pub tmp_t2: u64,
+    pub tmp_t3: u64,
+    pub tmp_t4: u64,
+    pub tmp_a0: u64,
+    pub tmp_a1: u64,
+    pub tmp_a2: u64,
+    pub tmp_a7: u64,
+
+    pub pctl: usize, // TODO: remove
+    pub tmp_ip: u64,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
+    pub altstack_top: usize,
+    pub altstack_bottom: usize,
+    pub disable_signals_depth: u64,
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
+}
+#[repr(C)]
+#[derive(Debug, Default)]
+pub struct ArchIntRegs {
+    pub int_regs: [u64; 31],
+    pub pc: u64,
+    pub fp_regs: [u64; 32],
+    pub fcsr: u32,
+    _pad: u32,
+}
+
+/// Deactive TLS, used before exec() on Redox to not trick target executable into thinking TLS
+/// is already initialized as if it was a thread.
+pub unsafe fn deactivate_tcb(open_via_dup: usize) -> Result<()> {
+    let mut env = syscall::EnvRegisters::default();
+
+    let file = FdGuard::new(syscall::dup(open_via_dup, b"regs/env")?);
+
+    env.tp = 0;
+
+    let _ = syscall::write(*file, &mut env)?;
+    Ok(())
+}
+
+pub fn copy_env_regs(cur_pid_fd: usize, new_pid_fd: usize) -> Result<()> {
+    // Copy environment registers.
+    {
+        let cur_env_regs_fd = FdGuard::new(syscall::dup(cur_pid_fd, b"regs/env")?);
+        let new_env_regs_fd = FdGuard::new(syscall::dup(new_pid_fd, b"regs/env")?);
+
+        let mut env_regs = syscall::EnvRegisters::default();
+        let _ = syscall::read(*cur_env_regs_fd, &mut env_regs)?;
+        let _ = syscall::write(*new_env_regs_fd, &env_regs)?;
+    }
+
+    Ok(())
+}
+
+unsafe extern "C" fn fork_impl(initial_rsp: *mut usize) -> usize {
+    Error::mux(fork_inner(initial_rsp))
+}
+
+unsafe extern "C" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
+    let _ = syscall::close(cur_filetable_fd);
+    crate::child_hook_common(FdGuard::new(new_pid_fd));
+}
+
+asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
+    .attribute arch, \"rv64gc\"  # rust bug 80608
+    addi sp, sp, -200
+    sd   s0, 0(sp)
+    sd   s1, 8(sp)
+    sd   s2, 16(sp)
+    sd   s3, 24(sp)
+    sd   s4, 32(sp)
+    sd   s5, 40(sp)
+    sd   s6, 48(sp)
+    sd   s7, 56(sp)
+    sd   s8, 64(sp)
+    sd   s9, 72(sp)
+    sd   s10, 80(sp)
+    sd   s11, 88(sp)
+    sd   ra, 96(sp)
+
+    fsd  fs0, 104(sp)
+    fsd  fs1, 112(sp)
+    fsd  fs2, 120(sp)
+    fsd  fs3, 128(sp)
+    fsd  fs4, 136(sp)
+    fsd  fs5, 144(sp)
+    fsd  fs6, 152(sp)
+    fsd  fs7, 160(sp)
+    fsd  fs8, 168(sp)
+    fsd  fs9, 176(sp)
+    fsd  fs10, 184(sp)
+    fsd  fs11, 192(sp)
+
+    addi sp, sp, -32
+    mv   a0, sp
+    jal  {fork_impl}
+
+    addi sp, sp, 32
+
+    ld   s0, 0(sp)
+    ld   s1, 8(sp)
+    ld   s2, 16(sp)
+    ld   s3, 24(sp)
+    ld   s4, 32(sp)
+    ld   s5, 40(sp)
+    ld   s6, 48(sp)
+    ld   s7, 56(sp)
+    ld   s8, 64(sp)
+    ld   s9, 72(sp)
+    ld   s10, 80(sp)
+    ld   s11, 88(sp)
+    ld   ra, 96(sp)
+
+    fld  fs0, 104(sp)
+    fld  fs1, 112(sp)
+    fld  fs2, 120(sp)
+    fld  fs3, 128(sp)
+    fld  fs4, 136(sp)
+    fld  fs5, 144(sp)
+    fld  fs6, 152(sp)
+    fld  fs7, 160(sp)
+    fld  fs8, 168(sp)
+    fld  fs9, 176(sp)
+    fld  fs10, 184(sp)
+    fld  fs11, 192(sp)
+
+    addi sp, sp, 200
+    ret
+"] <= [fork_impl = sym fork_impl]);
+
+asmfunction!(__relibc_internal_fork_ret: ["
+    .attribute arch, \"rv64gc\"  # rust bug 80608
+    ld   a0, 0(sp)
+    ld   a1, 8(sp)
+    jal  {child_hook}
+
+    mv   a0, x0
+
+    addi sp, sp, 32
+
+    ld   s0, 0(sp)
+    ld   s1, 8(sp)
+    ld   s2, 16(sp)
+    ld   s3, 24(sp)
+    ld   s4, 32(sp)
+    ld   s5, 40(sp)
+    ld   s6, 48(sp)
+    ld   s7, 56(sp)
+    ld   s8, 64(sp)
+    ld   s9, 72(sp)
+    ld   s10, 80(sp)
+    ld   s11, 88(sp)
+    ld   ra, 96(sp)
+
+    fld  fs0, 104(sp)
+    fld  fs1, 112(sp)
+    fld  fs2, 120(sp)
+    fld  fs3, 128(sp)
+    fld  fs4, 136(sp)
+    fld  fs5, 144(sp)
+    fld  fs6, 152(sp)
+    fld  fs7, 160(sp)
+    fld  fs8, 168(sp)
+    fld  fs9, 176(sp)
+    fld  fs10, 184(sp)
+    fld  fs11, 192(sp)
+
+    addi sp, sp, 200
+    ret
+"] <= [child_hook = sym child_hook]);
+
+asmfunction!(__relibc_internal_sigentry: ["
+    .attribute arch, \"rv64gc\"  # rust bug 80608
+    // Save some registers
+    ld   t0, -8(tp) // Tcb
+    sd   sp, ({tcb_sa_off} + {sa_tmp_sp})(t0)
+    sd   t1, ({tcb_sa_off} + {sa_tmp_t1})(t0)
+    sd   t2, ({tcb_sa_off} + {sa_tmp_t2})(t0)
+    sd   t3, ({tcb_sa_off} + {sa_tmp_t3})(t0)
+    sd   t4, ({tcb_sa_off} + {sa_tmp_t4})(t0)
+    ld   t4, ({tcb_sa_off} + {sa_off_pctl})(t0)
+
+    // First, select signal, always pick first available bit
+99:
+    // Read first signal word
+    ld   t1, ({tcb_sc_off} + {sc_word})(t0)
+    srli t2, t1, 32 // bitset to low word
+    and  t1, t1, t2  // masked bitset in low word
+    beqz t1, 3f
+
+    // Found in first thread signal word
+    mv   t3, x0
+2:  andi t2, t1, 1
+    bnez t2, 10f
+    addi t3, t3, 1
+    srli t1, t1, 1
+    j 2b
+
+    // If no unblocked thread signal was found, check for process.
+    // This is competitive; we need to atomically check if *we* cleared the process-wide pending
+    // bit, otherwise restart.
+3:  lw   t1, {pctl_off_pending}(t4)
+    and  t1, t1, t2
+    beqz t1, 3f
+    // Found in first process signal word
+    li   t3, -1
+2:  andi t2, t1, 1
+    addi t3, t3, 1
+    srli t1, t1, 1
+    beqz t2, 2b
+    slli t1, t3, 3 // * 8 == size_of SenderInfo
+    add  t1, t1, t4
+    ld   t1, {pctl_off_sender_infos}(t1)
+    sd   t1, ({tcb_sa_off} + {sa_tmp_id_inf})(t0)
+    li   t1, 1
+    sll  t1, t1, t3
+    not  t1, t1
+    addi t2, t4, {pctl_off_pending}
+    amoand.w.aq t2, t1, (t2)
+    and  t1, t1, t2
+    bne  t1, t2, 9f
+
+3:
+    // Read second signal word - both process and thread simultaneously.
+    // This must be done since POSIX requires low realtime signals to be picked first.
+    ld   t1, ({tcb_sc_off} + {sc_word} + 8)(t0)
+    lw   t2, ({pctl_off_pending} + 4)(t4)
+    or   t4, t1, t2
+    srli t2, t1, 32
+    and  t4, t2, t4
+    beqz t4, 7f
+    li   t3, -1
+2:  andi t2, t4, 1
+    addi t3, t3, 1
+    srli t4, t4, 1
+    beqz t2, 2b
+    li   t2, 1
+    sll  t2, t2, t3
+    and  t1, t1, t2
+    addi t3, t3, 32
+    bnez t1, 10f // thread signal
+
+    // otherwise, try (competitively) dequeueing realtime signal
+    sd   a0, ({tcb_sa_off} + {sa_tmp_a0})(t0)
+    sd   a1, ({tcb_sa_off} + {sa_tmp_a1})(t0)
+    sd   a2, ({tcb_sa_off} + {sa_tmp_a2})(t0)
+    sd   a7, ({tcb_sa_off} + {sa_tmp_a7})(t0)
+    li   a0, {SYS_SIGDEQUEUE}
+    addi a1, t3, -32
+    add  a2, t0, {tcb_sa_off} + {sa_tmp_rt_inf} // out pointer of dequeued realtime sig
+    ecall
+    bnez a0, 99b // assumes error can only be EAGAIN
+    j   9f
+
+10: // thread signal. t3 holds signal number
+    srli t1, t3, 5
+    bnez t1, 2f // FIXME senderinfo?
+    sll  t2, t3, 3 // * 8 == size_of SenderInfo
+    add  t2, t2, t0
+    ld   t2, ({tcb_sc_off} + {sc_sender_infos})(t2)
+    sd   t2, ({tcb_sa_off} + {sa_tmp_id_inf})(t0)
+2:  andi t4, t3, 31
+    li   t2, 1
+    sll  t2, t2, t4
+    not  t2, t2
+    sll  t1, t1, 3
+    add  t1, t1, t0
+    addi t1, t1, {tcb_sc_off} + {sc_word}
+    amoand.w.aq x0, t2, (t1)
+    addi t3, t3, 64 // indicate signal was targeted at thread
+
+9: // process signal t3 holds signal number
+
+    // By now we have selected a signal, stored in eax (6-bit). We now need to choose whether or
+    // not to switch to the alternate signal stack. If SA_ONSTACK is clear for this signal, then
+    // skip the sigaltstack logic.
+    ld   t4, ({tcb_sa_off} + {sa_off_pctl})(t0)
+    andi t1, t3, 63
+    slli t1, t1, 4 // * 16 == size_of RawAction
+    add  t1, t1, t4
+    ld   t1, {pctl_off_actions}(t1)
+    slli t1, t1, 63-58 // SA_ONSTACK in sign bit
+    bgez t1, 3f
+
+    // If current RSP is above altstack region, switch to altstack
+    ld  t1, ({tcb_sa_off} + {sa_altstack_top})(t0)
+    bgtu sp, t1, 2f
+    ld  t2, ({tcb_sa_off} + {sa_altstack_bottom})(t0)
+    bgtu sp, t3, 3f
+2:  mv  sp, t1
+3:
+    // form mcontext on stack
+    addi sp, sp, -33 * 8
+    fsd  f0, (0 * 8)(sp)
+    fsd  f1, (1 * 8)(sp)
+    fsd  f2, (2 * 8)(sp)
+    fsd  f3, (3 * 8)(sp)
+    fsd  f4, (4 * 8)(sp)
+    fsd  f5, (5 * 8)(sp)
+    fsd  f6, (6 * 8)(sp)
+    fsd  f7, (7 * 8)(sp)
+    fsd  f8, (8 * 8)(sp)
+    fsd  f9, (9 * 8)(sp)
+    fsd  f10, (10 * 8)(sp)
+    fsd  f11, (11 * 8)(sp)
+    fsd  f12, (12 * 8)(sp)
+    fsd  f13, (13 * 8)(sp)
+    fsd  f14, (14 * 8)(sp)
+    fsd  f15, (15 * 8)(sp)
+    fsd  f16, (16 * 8)(sp)
+    fsd  f17, (17 * 8)(sp)
+    fsd  f18, (18 * 8)(sp)
+    fsd  f19, (19 * 8)(sp)
+    fsd  f20, (20 * 8)(sp)
+    fsd  f21, (21 * 8)(sp)
+    fsd  f22, (22 * 8)(sp)
+    fsd  f23, (23 * 8)(sp)
+    fsd  f24, (24 * 8)(sp)
+    fsd  f25, (25 * 8)(sp)
+    fsd  f26, (26 * 8)(sp)
+    fsd  f27, (27 * 8)(sp)
+    fsd  f28, (28 * 8)(sp)
+    fsd  f29, (29 * 8)(sp)
+    fsd  f30, (30 * 8)(sp)
+    fsd  f31, (31 * 8)(sp)
+    csrr t1, fcsr
+    sw   t1, (32 * 8)(sp)
+
+    addi sp, sp, -32 * 8
+    sd   x1, 0(sp)
+    ld   t1, ({tcb_sa_off} + {sa_tmp_sp})(t0)
+    sd   t1, (1 * 8)(sp)  // x2 is sp
+    sd   x3, (2 * 8)(sp)
+    sd   x4, (3 * 8)(sp)
+    ld   t1, ({tcb_sc_off} + {sc_saved_t0})(t0)
+    sd   t1, (4 * 8)(sp) // x5 is t0
+    ld   t1, ({tcb_sa_off} + {sa_tmp_t1})(t0)
+    sd   t1, (5 * 8)(sp) // x6 is t1
+    ld   t1, ({tcb_sa_off} + {sa_tmp_t2})(t0)
+    sd   t1, (6 * 8)(sp) // x7 is t2
+    sd   x8, (7 * 8)(sp)
+    sd   x9, (8 * 8)(sp)
+    sd   x10, (9 * 8)(sp)
+    sd   x11, (10 * 8)(sp)
+    sd   x12, (11 * 8)(sp)
+    sd   x13, (12 * 8)(sp)
+    sd   x14, (13 * 8)(sp)
+    sd   x15, (14 * 8)(sp)
+    sd   x16, (15 * 8)(sp)
+    sd   x17, (16 * 8)(sp)
+    sd   x18, (17 * 8)(sp)
+    sd   x19, (18 * 8)(sp)
+    sd   x20, (19 * 8)(sp)
+    sd   x21, (20 * 8)(sp)
+    sd   x22, (21 * 8)(sp)
+    sd   x23, (22 * 8)(sp)
+    sd   x24, (23 * 8)(sp)
+    sd   x25, (24 * 8)(sp)
+    sd   x26, (25 * 8)(sp)
+    sd   x27, (26 * 8)(sp)
+    ld   t1, ({tcb_sa_off} + {sa_tmp_t3})(t0)
+    sd   t1, (27 * 8)(sp) // t3 is x28
+    ld   t1, ({tcb_sa_off} + {sa_tmp_t4})(t0)
+    sd   t1, (28 * 8)(sp) // t4 is x29
+    sd   x30, (29 * 8)(sp)
+    sd   x31, (30 * 8)(sp)
+    ld   t1, ({tcb_sc_off} + {sc_saved_ip})(t0)
+    sd   t1, (31 * 8)(sp)
+
+    // form ucontext
+    addi sp, sp, -64
+    sw   t3, 60(sp)
+
+    mv   t0, sp
+    jal  {inner}
+
+    addi sp, sp, 64
+
+    addi t0, sp, 32 * 8
+    fld  f0, (0 * 8)(t0)
+    fld  f1, (1 * 8)(t0)
+    fld  f2, (2 * 8)(t0)
+    fld  f3, (3 * 8)(t0)
+    fld  f4, (4 * 8)(t0)
+    fld  f5, (5 * 8)(t0)
+    fld  f6, (6 * 8)(t0)
+    fld  f7, (7 * 8)(t0)
+    fld  f8, (8 * 8)(t0)
+    fld  f9, (9 * 8)(t0)
+    fld  f10, (10 * 8)(t0)
+    fld  f11, (11 * 8)(t0)
+    fld  f12, (12 * 8)(t0)
+    fld  f13, (13 * 8)(t0)
+    fld  f14, (14 * 8)(t0)
+    fld  f15, (15 * 8)(t0)
+    fld  f16, (16 * 8)(t0)
+    fld  f17, (17 * 8)(t0)
+    fld  f18, (18 * 8)(t0)
+    fld  f19, (19 * 8)(t0)
+    fld  f20, (20 * 8)(t0)
+    fld  f21, (21 * 8)(t0)
+    fld  f22, (22 * 8)(t0)
+    fld  f23, (23 * 8)(t0)
+    fld  f24, (24 * 8)(t0)
+    fld  f25, (25 * 8)(t0)
+    fld  f26, (26 * 8)(t0)
+    fld  f27, (27 * 8)(t0)
+    fld  f28, (28 * 8)(t0)
+    fld  f29, (29 * 8)(t0)
+    fld  f30, (30 * 8)(t0)
+    fld  f31, (31 * 8)(t0)
+    lw   t1, (32 * 8)(t0)
+    csrw fcsr, t1
+
+    ld   x1, 0(sp)
+    // skip sp
+    // skip gp
+    ld   x4, (3 * 8)(sp)
+    ld   x5, (4 * 8)(sp)
+    ld   x6, (5 * 8)(sp)
+    ld   x7, (6 * 8)(sp)
+    ld   x8, (7 * 8)(sp)
+    ld   x9, (8 * 8)(sp)
+    ld   x10, (9 * 8)(sp)
+    ld   x11, (10 * 8)(sp)
+    ld   x12, (11 * 8)(sp)
+    ld   x13, (12 * 8)(sp)
+    ld   x14, (13 * 8)(sp)
+    ld   x15, (14 * 8)(sp)
+    ld   x16, (15 * 8)(sp)
+    ld   x17, (16 * 8)(sp)
+    ld   x18, (17 * 8)(sp)
+    ld   x19, (18 * 8)(sp)
+    ld   x20, (19 * 8)(sp)
+    ld   x21, (20 * 8)(sp)
+    ld   x22, (21 * 8)(sp)
+    ld   x23, (22 * 8)(sp)
+    ld   x24, (23 * 8)(sp)
+    ld   x25, (24 * 8)(sp)
+    ld   x26, (25 * 8)(sp)
+    ld   x27, (26 * 8)(sp)
+    ld   x28, (27 * 8)(sp)
+    ld   x29, (28 * 8)(sp)
+    ld   x30, (29 * 8)(sp)
+    ld   x31, (30 * 8)(sp)
+    ld   gp, (31 * 8)(sp) // new IP; this clobbers register x3/gp which is ABI reserved
+    .global __relibc_internal_sigentry_crit_first
+__relibc_internal_sigentry_crit_first:
+    ld   sp, (1 * 8)(sp)
+    .global __relibc_internal_sigentry_crit_second
+__relibc_internal_sigentry_crit_second:
+    jr   gp
+7:
+    // A spurious signal occurred. Signals are still disabled here, but will need to be re-enabled.
+
+    // restore stack
+    ld   sp, ({tcb_sa_off} + {sa_tmp_sp})(t0)
+
+    // move saved IP away from control, allowing arch_pre to save us if interrupted.
+    ld t1, ({tcb_sc_off} + {sc_saved_ip})(t0)
+    sd t1, ({tcb_sa_off} + {sa_tmp_ip})(t0)
+
+    // restore regs
+    ld   t2, ({tcb_sa_off} + {sa_tmp_t2})(t0)
+    ld   t3, ({tcb_sa_off} + {sa_tmp_t3})(t0)
+    ld   t4, ({tcb_sa_off} + {sa_tmp_t4})(t0)
+
+    // move saved t0 away from control as well
+    mv   t1, t0
+    ld   t0, ({tcb_sc_off} + {sc_saved_t0})(t0)
+
+    // Re-enable signals. This code can be interrupted after this signal, so we need to define
+    // 'crit_third'.
+    ld   gp, ({tcb_sc_off} + {sc_control})(t1)
+    andi gp, gp, ~1
+    sd   gp, ({tcb_sc_off} + {sc_control})(t1)
+
+    .globl __relibc_internal_sigentry_crit_third
+__relibc_internal_sigentry_crit_third:
+    ld   gp, ({tcb_sa_off} + {sa_tmp_ip})(t1)
+    .globl __relibc_internal_sigentry_crit_fourth
+__relibc_internal_sigentry_crit_fourth:
+    ld   t1, ({tcb_sa_off} + {sa_tmp_t1})(t1)
+    .globl __relibc_internal_sigentry_crit_fifth
+__relibc_internal_sigentry_crit_fifth:
+    jr   gp
+ "] <= [
+    tcb_sc_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control)),
+    sc_word = const offset_of!(Sigcontrol, word),
+    sc_saved_t0 = const offset_of!(Sigcontrol, saved_archdep_reg),
+    sc_saved_ip = const offset_of!(Sigcontrol, saved_ip),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
+    sc_control = const offset_of!(Sigcontrol, control_flags),
+
+    tcb_sa_off = const (offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch)),
+    sa_off_pctl = const offset_of!(SigArea, pctl),
+    sa_tmp_sp = const offset_of!(SigArea, tmp_sp),
+    sa_tmp_t1 = const offset_of!(SigArea, tmp_t1),
+    sa_tmp_t2 = const offset_of!(SigArea, tmp_t2),
+    sa_tmp_t3 = const offset_of!(SigArea, tmp_t3),
+    sa_tmp_t4 = const offset_of!(SigArea, tmp_t4),
+    sa_tmp_a0 = const offset_of!(SigArea, tmp_a0),
+    sa_tmp_a1 = const offset_of!(SigArea, tmp_a1),
+    sa_tmp_a2 = const offset_of!(SigArea, tmp_a2),
+    sa_tmp_a7 = const offset_of!(SigArea, tmp_a7),
+    sa_tmp_ip = const offset_of!(SigArea, tmp_ip),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_altstack_top = const offset_of!(SigArea, altstack_top),
+    sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
+
+    pctl_off_actions = const offset_of!(SigProcControl, actions),
+    inner = sym inner_c,
+    pctl_off_pending = const offset_of!(SigProcControl, pending),
+    pctl_off_sender_infos = const offset_of!(SigProcControl, sender_infos),
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
+]);
+
+asmfunction!(__relibc_internal_rlct_clone_ret: ["
+    ld t0, 0(sp)
+    ld a0, 8(sp)
+    ld a1, 16(sp)
+    ld a2, 24(sp)
+    ld a3, 32(sp)
+    ld a4, 40(sp)
+    ld a5, 48(sp)
+    addi sp, sp, 56
+
+    jalr t0
+    ret
+"] <= []);
+
+pub fn current_sp() -> usize {
+    let sp: usize;
+    unsafe {
+        core::arch::asm!(
+        "mv {}, sp",
+        out(reg) sp,
+        options(nomem));
+    }
+    sp
+}
+
+pub unsafe fn manually_enter_trampoline() {
+    let ctl = &Tcb::current().unwrap().os_specific.control;
+
+    ctl.control_flags.store(
+        ctl.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(),
+        Ordering::Release,
+    );
+    ctl.saved_archdep_reg.set(0);
+    let ip_location = &ctl.saved_ip as *const _ as usize;
+
+    core::arch::asm!("
+        jal 2f
+        j 3f
+    2:
+        sd ra, 0(t0)
+        la t0, __relibc_internal_sigentry
+        jalr x0, t0
+    3:
+    ", inout("t0") ip_location => _, out("ra") _);
+}
+
+extern "C" {
+    fn __relibc_internal_sigentry_crit_first();
+    fn __relibc_internal_sigentry_crit_second();
+    fn __relibc_internal_sigentry_crit_third();
+    fn __relibc_internal_sigentry_crit_fourth();
+    fn __relibc_internal_sigentry_crit_fifth();
+}
+pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) -> PosixStackt {
+    // It is impossible to update SP and PC atomically. Instead, we abuse the fact that
+    // signals are disabled in the prologue of the signal trampoline, which allows us to emulate
+    // atomicity inside the critical section, consisting of one instruction at 'crit_first', and
+    // one at 'crit_second', see asm.
+
+    if stack.regs.pc == __relibc_internal_sigentry_crit_first as u64 {
+        // Reexecute 'ld sp, (1 * 8)(sp)'
+        let stack_ptr = stack.regs.int_regs[1] as *const u64; // x2
+        stack.regs.int_regs[1] = stack_ptr.add(1).read();
+        // and 'jr gp' steps.
+        stack.regs.pc = stack.regs.int_regs[2];
+    } else if stack.regs.pc == __relibc_internal_sigentry_crit_second as u64
+        || stack.regs.pc == __relibc_internal_sigentry_crit_fifth as u64
+    {
+        // just reexecute the jump
+        stack.regs.pc = stack.regs.int_regs[2];
+    } else if stack.regs.pc == __relibc_internal_sigentry_crit_third as u64 {
+        // ld   gp, ({tcb_sa_off} + {sa_tmp_ip})(t1)
+        stack.regs.int_regs[2] = area.tmp_ip;
+        // ld   t1, ({tcb_sa_off} + {sa_tmp_t1})(t1)
+        stack.regs.int_regs[5] = area.tmp_t1;
+        // j    gp
+        stack.regs.pc = stack.regs.int_regs[2];
+    } else if stack.regs.pc == __relibc_internal_sigentry_crit_fourth as u64 {
+        // ld   t1, ({tcb_sa_off} + {sa_tmp_t1})(t1)
+        stack.regs.int_regs[5] = area.tmp_t1;
+        // jr   gp
+        stack.regs.pc = stack.regs.int_regs[2];
+    }
+
+    get_sigaltstack(area, stack.regs.int_regs[1] as usize).into()
+}

redox-rt/src/arch/x86_64.rs

-use core::mem::offset_of;
-use core::sync::atomic::{AtomicU8, Ordering};
-
-use syscall::data::{Sigcontrol, SigProcControl};
-use syscall::error::*;
-use syscall::flag::*;
-
-use crate::proc::{fork_inner, FdGuard};
-use crate::signal::{tmp_disable_signals, SigStack};
-use crate::signal::{inner_c, RtSigarea, PROC_CONTROL_STRUCT};
-use crate::Tcb;
+use core::{
+    mem::offset_of,
+    ptr::NonNull,
+    sync::atomic::{AtomicU8, Ordering},
+};
+
+use syscall::{
+    data::{SigProcControl, Sigcontrol},
+    error::*,
+    RtSigInfo,
+};
+
+use crate::{
+    proc::{fork_inner, FdGuard},
+    signal::{get_sigaltstack, inner_c, PosixStackt, RtSigarea, SigStack, PROC_CONTROL_STRUCT},
+    Tcb,
+};
 
 // Setup a stack starting from the very end of the address space, and then growing downwards.
 pub(crate) const STACK_TOP: usize = 1 << 47;
@@ -21,11 +27,16 @@ pub struct SigArea {
     pub tmp_rsp: usize,
     pub tmp_rax: usize,
     pub tmp_rdx: usize,
+    pub tmp_rdi: usize,
+    pub tmp_rsi: usize,
+    pub tmp_rt_inf: RtSigInfo,
+    pub tmp_id_inf: u64,
 
     pub altstack_top: usize,
     pub altstack_bottom: usize,
     pub disable_signals_depth: u64,
-    pub pctl: usize, // TODO: find out how to correctly reference that static
+    pub last_sig_was_restart: bool,
+    pub last_sigstack: Option<NonNull<SigStack>>,
 }
 
 #[repr(C, align(16))]
@@ -87,7 +98,7 @@ unsafe extern "sysv64" fn fork_impl(initial_rsp: *mut usize) -> usize {
 
 unsafe extern "sysv64" fn child_hook(cur_filetable_fd: usize, new_pid_fd: usize) {
     let _ = syscall::close(cur_filetable_fd);
-    let _ = syscall::close(new_pid_fd);
+    crate::child_hook_common(FdGuard::new(new_pid_fd));
 }
 
 asmfunction!(__relibc_internal_fork_wrapper -> usize: ["
@@ -120,8 +131,8 @@ asmfunction!(__relibc_internal_fork_ret: ["
     mov rsi, [rsp + 8]
     call {child_hook}
 
-    ldmxcsr [rsp+16]
-    fldcw [rsp+24]
+    ldmxcsr [rsp + 16]
+    fldcw [rsp + 24]
 
     xor rax, rax
 
@@ -146,14 +157,10 @@ asmfunction!(__relibc_internal_rlct_clone_ret: ["
     pop r8
     pop r9
 
-    sub rsp, 8
-
-    mov DWORD PTR [rsp], 0x00001F80
-    ldmxcsr [rsp]
-    mov WORD PTR [rsp], 0x037F
-    fldcw [rsp]
-
-    add rsp, 8
+    mov DWORD PTR [rsp - 8], 0x00001F80
+    ldmxcsr [rsp - 8]
+    mov WORD PTR [rsp - 8], 0x037F
+    fldcw [rsp - 8]
 
     # Call entry point
     call rax
@@ -166,10 +173,12 @@ asmfunction!(__relibc_internal_sigentry: ["
     mov fs:[{tcb_sa_off} + {sa_tmp_rsp}], rsp
     mov fs:[{tcb_sa_off} + {sa_tmp_rax}], rax
     mov fs:[{tcb_sa_off} + {sa_tmp_rdx}], rdx
+    mov fs:[{tcb_sa_off} + {sa_tmp_rdi}], rdi
+    mov fs:[{tcb_sa_off} + {sa_tmp_rsi}], rsi
 
     // First, select signal, always pick first available bit
-
-    // Read first signal word
+1:
+    // Read standard signal word - first targeting this thread
     mov rax, fs:[{tcb_sc_off} + {sc_word}]
     mov rdx, rax
     shr rdx, 32
@@ -177,28 +186,65 @@ asmfunction!(__relibc_internal_sigentry: ["
     bsf eax, eax
     jnz 2f
 
-    // Read second signal word
-    mov rax, fs:[{tcb_sc_off} + {sc_word} + 8]
-    mov rdx, rax
-    shr rdx, 32
+    // If no unblocked thread signal was found, check for process.
+    // This is competitive; we need to atomically check if *we* cleared the process-wide pending
+    // bit, otherwise restart.
+    mov eax, [rip + {pctl} + {pctl_off_pending}]
     and eax, edx
     bsf eax, eax
-    jz 6f
-    add eax, 32
+    jz 8f
+    lea rdi, [rip + {pctl} + {pctl_off_sender_infos}]
+    mov rdi, [rdi + rax * 8]
+    lock btr [rip + {pctl} + {pctl_off_pending}], eax
+    mov fs:[{tcb_sa_off} + {sa_tmp_id_inf}], rdi
+    jc 9f
+8:
+    // Read second signal word - both process and thread simultaneously.
+    // This must be done since POSIX requires low realtime signals to be picked first.
+    mov edx, fs:[{tcb_sc_off} + {sc_word} + 8]
+    mov eax, [rip + {pctl} + {pctl_off_pending} + 4]
+    or eax, edx
+    and eax, fs:[{tcb_sc_off} + {sc_word} + 12]
+    bsf eax, eax
+    jz 7f
+
+    bt edx, eax // check if signal was sent to thread specifically
+    jc 2f // if so, continue as usual
+
+    // otherwise, try (competitively) dequeueing realtime signal
+    mov esi, eax
+    mov eax, {SYS_SIGDEQUEUE}
+    mov rdi, fs:[0]
+    add rdi, {tcb_sa_off} + {sa_tmp_rt_inf} // out pointer of dequeued realtime sig
+    syscall
+    test eax, eax
+    jnz 1b // assumes error can only be EAGAIN
+    lea eax, [esi + 32]
+    jmp 9f
 2:
+    mov edx, eax
+    shr edx, 5
+    mov rdi, fs:[{tcb_sc_off} + {sc_sender_infos} + eax * 8]
+    lock btr fs:[{tcb_sc_off} + {sc_word} + edx * 4], eax
+    mov fs:[{tcb_sa_off} + {sa_tmp_id_inf}], rdi
+    add eax, 64 // indicate signal was targeted at thread
+9:
     sub rsp, {REDZONE_SIZE}
     and rsp, -{STACK_ALIGN}
 
     // By now we have selected a signal, stored in eax (6-bit). We now need to choose whether or
     // not to switch to the alternate signal stack. If SA_ONSTACK is clear for this signal, then
     // skip the sigaltstack logic.
-    mov edx, eax
-    add edx, edx
-    lea rdx, [{pctl_off_actions} + edx * 8]
-    add rdx, fs:[{tcb_sa_off} + {sa_off_pctl}]
+    lea rdx, [rip + {pctl} + {pctl_off_actions}]
+
+    mov ecx, eax
+    and ecx, 63
+
+    // LEA doesn't support 16x, so just do two x8s.
+    lea rdx, [rdx + 8 * rcx]
+    lea rdx, [rdx + 8 * rcx]
 
-    // scale factor 16 doesn't exist, so we premultiplied edx by 2
-    bt qword ptr [rdx], 56
+    bt qword ptr [rdx], {SA_ONSTACK_BIT}
     jnc 4f
 
     // Otherwise, the altstack is already active. The sigaltstack being disabled, is equivalent
@@ -221,8 +267,8 @@ asmfunction!(__relibc_internal_sigentry: ["
     push fs:[{tcb_sc_off} + {sc_saved_rip}]
     push fs:[{tcb_sc_off} + {sc_saved_rflags}]
 
-    push rdi
-    push rsi
+    push fs:[{tcb_sa_off} + {sa_tmp_rdi}]
+    push fs:[{tcb_sa_off} + {sa_tmp_rsi}]
     push fs:[{tcb_sa_off} + {sa_tmp_rdx}]
     push rcx
     push fs:[{tcb_sa_off} + {sa_tmp_rax}]
@@ -261,15 +307,15 @@ asmfunction!(__relibc_internal_sigentry: ["
     vextractf128 [rsp + 16], ymm14, 1
     vextractf128 [rsp], ymm15, 1
 5:
-    push rax // selected signal
-    sub rsp, 8
+    mov [rsp - 4], eax
+    sub rsp, 64 // alloc space for ucontext fields
 
     mov rdi, rsp
     call {inner}
 
-    add rsp, 16
+    add rsp, 64
 
-    fxrstor64 [rsp]
+    fxrstor64 [rsp + 16 * 16]
 
     cmp byte ptr [rip + {supports_avx}], 0
     je 6f
@@ -324,40 +370,75 @@ __relibc_internal_sigentry_crit_first:
     .globl __relibc_internal_sigentry_crit_second
 __relibc_internal_sigentry_crit_second:
     jmp qword ptr fs:[{tcb_sa_off} + {sa_tmp_rip}]
-6:
-    ud2
-    // Spurious signal
+7:
+    // A spurious signal occurred. Signals are still disabled here, but will need to be re-enabled.
+
+    // restore flags
+    mov rax, fs:[0] // load FS base
+    // TODO: Use lahf/sahf rather than pushfq/popfq?
+    lea rsp, [rax + {tcb_sc_off} + {sc_saved_rflags}]
+    popfq
+
+    // restore stack
+    mov rsp, fs:[{tcb_sa_off} + {sa_tmp_rsp}]
+
+    // move saved RIP away from control, allowing arch_pre to save us if interrupted.
+    mov rax, fs:[{tcb_sc_off} + {sc_saved_rip}]
+    mov fs:[{tcb_sa_off} + {sa_tmp_rip}], rax
+
+    // restore regs
+    mov rax, fs:[{tcb_sa_off} + {sa_tmp_rax}]
+    mov rdx, fs:[{tcb_sa_off} + {sa_tmp_rdx}]
+
+    // Re-enable signals. This code can be interrupted after this signal, so we need to define
+    // 'crit_third'.
+    and qword ptr fs:[{tcb_sc_off} + {sc_control}], ~1
+
+    .globl __relibc_internal_sigentry_crit_third
+__relibc_internal_sigentry_crit_third:
+    jmp qword ptr fs:[{tcb_sa_off} + {sa_tmp_rip}]
 "] <= [
     inner = sym inner_c,
     sa_tmp_rip = const offset_of!(SigArea, tmp_rip),
     sa_tmp_rsp = const offset_of!(SigArea, tmp_rsp),
     sa_tmp_rax = const offset_of!(SigArea, tmp_rax),
     sa_tmp_rdx = const offset_of!(SigArea, tmp_rdx),
+    sa_tmp_rdi = const offset_of!(SigArea, tmp_rdi),
+    sa_tmp_rsi = const offset_of!(SigArea, tmp_rsi),
+    sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
+    sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
     sa_altstack_top = const offset_of!(SigArea, altstack_top),
     sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
     sc_saved_rflags = const offset_of!(Sigcontrol, saved_archdep_reg),
     sc_saved_rip = const offset_of!(Sigcontrol, saved_ip),
     sc_word = const offset_of!(Sigcontrol, word),
+    sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
+    sc_control = const offset_of!(Sigcontrol, control_flags),
     tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
     tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
     pctl_off_actions = const offset_of!(SigProcControl, actions),
-    //pctl = sym PROC_CONTROL_STRUCT,
-    sa_off_pctl = const offset_of!(SigArea, pctl),
+    pctl_off_pending = const offset_of!(SigProcControl, pending),
+    pctl_off_sender_infos = const offset_of!(SigProcControl, sender_infos),
+    pctl = sym PROC_CONTROL_STRUCT,
     supports_avx = sym SUPPORTS_AVX,
     REDZONE_SIZE = const 128,
     STACK_ALIGN = const 16,
+    SA_ONSTACK_BIT = const 58, // (1 << 58) >> 32 = 0x0400_0000
+    SYS_SIGDEQUEUE = const syscall::SYS_SIGDEQUEUE,
 ]);
 
 extern "C" {
     fn __relibc_internal_sigentry_crit_first();
     fn __relibc_internal_sigentry_crit_second();
+    fn __relibc_internal_sigentry_crit_third();
 }
-pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) {
+/// Fixes some edge cases, and calculates the value for uc_stack.
+pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) -> PosixStackt {
     // It is impossible to update RSP and RIP atomically on x86_64, without using IRETQ, which is
     // almost as slow as calling a SIGRETURN syscall would be. Instead, we abuse the fact that
     // signals are disabled in the prologue of the signal trampoline, which allows us to emulate
-    // atomicity inside the critical section, consisting of one instruction at 'crit_first', and
-    // one at 'crit_second', see asm.
+    // atomicity inside the critical section, consisting of one instruction at 'crit_first', one at
+    // 'crit_second', and one at 'crit_third', see asm.
 
     if stack.regs.rip == __relibc_internal_sigentry_crit_first as usize {
         // Reexecute pop rsp and jump steps. This case needs to be different from the one below,
@@ -366,18 +447,27 @@ pub unsafe fn arch_pre(stack: &mut SigStack, area: &mut SigArea) {
         let stack_ptr = stack.regs.rsp as *const usize;
         stack.regs.rsp = stack_ptr.read();
         stack.regs.rip = stack_ptr.sub(1).read();
-    } else if stack.regs.rip == __relibc_internal_sigentry_crit_second as usize {
+    } else if stack.regs.rip == __relibc_internal_sigentry_crit_second as usize
+        || stack.regs.rip == __relibc_internal_sigentry_crit_third as usize
+    {
         // Almost finished, just reexecute the jump before tmp_rip is overwritten by this
         // deeper-level signal.
         stack.regs.rip = area.tmp_rip;
     }
+
+    get_sigaltstack(area, stack.regs.rsp).into()
 }
 
-static SUPPORTS_AVX: AtomicU8 = AtomicU8::new(1); // FIXME
+pub(crate) static SUPPORTS_AVX: AtomicU8 = AtomicU8::new(0);
 
+// __relibc will be prepended to the name, so no_mangle is fine
+#[no_mangle]
 pub unsafe fn manually_enter_trampoline() {
     let c = &Tcb::current().unwrap().os_specific.control;
-    c.control_flags.store(c.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(), Ordering::Release);
+    c.control_flags.store(
+        c.control_flags.load(Ordering::Relaxed) | syscall::flag::INHIBIT_DELIVERY.bits(),
+        Ordering::Release,
+    );
     c.saved_archdep_reg.set(0); // TODO: Just reset DF on x86?
 
     core::arch::asm!("

redox-rt/src/lib.rs

 #![no_std]
-#![feature(asm_const, array_chunks, int_roundings, let_chains, slice_ptr_get, sync_unsafe_cell)]
+#![feature(
+    asm_const,
+    array_chunks,
+    int_roundings,
+    let_chains,
+    slice_ptr_get,
+    sync_unsafe_cell
+)]
 #![forbid(unreachable_patterns)]
 
+use core::cell::{SyncUnsafeCell, UnsafeCell};
+
 use generic_rt::{ExpectTlsFree, GenericTcb};
+use syscall::{Sigcontrol, O_CLOEXEC};
 
-use self::signal::RtSigarea;
+use self::proc::FdGuard;
 
 extern crate alloc;
 
@@ -39,11 +49,33 @@ pub mod sync;
 pub mod sys;
 pub mod thread;
 
-pub type Tcb = GenericTcb<RtSigarea>;
+#[derive(Debug, Default)]
+pub struct RtTcb {
+    pub control: Sigcontrol,
+    pub arch: UnsafeCell<crate::arch::SigArea>,
+    pub thr_fd: UnsafeCell<Option<FdGuard>>,
+}
+impl RtTcb {
+    pub fn current() -> &'static Self {
+        unsafe { &Tcb::current().unwrap().os_specific }
+    }
+    pub fn thread_fd(&self) -> &FdGuard {
+        unsafe {
+            if (&*self.thr_fd.get()).is_none() {
+                self.thr_fd.get().write(Some(FdGuard::new(
+                    syscall::open("/scheme/thisproc/current/open_via_dup", O_CLOEXEC).unwrap(),
+                )));
+            }
+            (&*self.thr_fd.get()).as_ref().unwrap()
+        }
+    }
+}
+
+pub type Tcb = GenericTcb<RtTcb>;
 
 /// OS and architecture specific code to activate TLS - Redox aarch64
 #[cfg(target_arch = "aarch64")]
-pub unsafe fn tcb_activate(tls_end: usize, tls_len: usize) {
+pub unsafe fn tcb_activate(_tcb: &RtTcb, tls_end: usize, tls_len: usize) {
     // Uses ABI page
     let abi_ptr = tls_end - tls_len - 16;
     core::ptr::write(abi_ptr as *mut usize, tls_end);
@@ -55,70 +87,108 @@ pub unsafe fn tcb_activate(tls_end: usize, tls_len: usize) {
 
 /// OS and architecture specific code to activate TLS - Redox x86
 #[cfg(target_arch = "x86")]
-pub unsafe fn tcb_activate(tls_end: usize, _tls_len: usize) {
+pub unsafe fn tcb_activate(tcb: &RtTcb, tls_end: usize, _tls_len: usize) {
     let mut env = syscall::EnvRegisters::default();
 
-    let file = syscall::open(
-        "thisproc:current/regs/env",
-        syscall::O_CLOEXEC | syscall::O_RDWR,
-    )
-    .expect_notls("failed to open handle for process registers");
+    let file = FdGuard::new(
+        syscall::dup(**tcb.thread_fd(), b"regs/env")
+            .expect_notls("failed to open handle for process registers"),
+    );
 
-    let _ = syscall::read(file, &mut env).expect_notls("failed to read gsbase");
+    let _ = syscall::read(*file, &mut env).expect_notls("failed to read gsbase");
 
     env.gsbase = tls_end as u32;
 
-    let _ = syscall::write(file, &env).expect_notls("failed to write gsbase");
-
-    let _ = syscall::close(file);
+    let _ = syscall::write(*file, &env).expect_notls("failed to write gsbase");
 }
 
 /// OS and architecture specific code to activate TLS - Redox x86_64
 #[cfg(target_arch = "x86_64")]
-pub unsafe fn tcb_activate(tls_end_and_tcb_start: usize, _tls_len: usize) {
+pub unsafe fn tcb_activate(tcb: &RtTcb, tls_end_and_tcb_start: usize, _tls_len: usize) {
     let mut env = syscall::EnvRegisters::default();
 
-    let file = syscall::open(
-        "thisproc:current/regs/env",
-        syscall::O_CLOEXEC | syscall::O_RDWR,
-    )
-    .expect_notls("failed to open handle for process registers");
+    let file = FdGuard::new(
+        syscall::dup(**tcb.thread_fd(), b"regs/env")
+            .expect_notls("failed to open handle for process registers"),
+    );
 
-    let _ = syscall::read(file, &mut env).expect_notls("failed to read fsbase");
+    let _ = syscall::read(*file, &mut env).expect_notls("failed to read fsbase");
 
     env.fsbase = tls_end_and_tcb_start as u64;
 
-    let _ = syscall::write(file, &env).expect_notls("failed to write fsbase");
+    let _ = syscall::write(*file, &env).expect_notls("failed to write fsbase");
+}
 
-    let _ = syscall::close(file);
+/// OS and architecture specific code to activate TLS - Redox riscv64
+#[cfg(target_arch = "riscv64")]
+pub unsafe fn tcb_activate(_tcb: &RtTcb, tls_end: usize, tls_len: usize) {
+    // tp points to static tls block
+    // FIXME limited to a single initial master
+    let tls_start = tls_end - tls_len;
+    let abi_ptr = tls_start - 8;
+    core::ptr::write(abi_ptr as *mut usize, tls_end);
+    core::arch::asm!(
+        "mv tp, {}",
+        in(reg) tls_start
+    );
 }
 
 /// Initialize redox-rt in situations where relibc is not used
-pub fn initialize_freestanding() {
+pub unsafe fn initialize_freestanding() {
     // TODO: This code is a hack! Integrate the ld_so TCB code into generic-rt, and then use that
     // (this function will need pointers to the ELF structs normally passed in auxvs), so the TCB
     // is initialized properly.
 
     // TODO: TLS
-    let page = unsafe {
-        &mut *(syscall::fmap(!0, &syscall::Map {
-            offset: 0,
-            size: syscall::PAGE_SIZE,
-            flags: syscall::MapFlags::PROT_READ | syscall::MapFlags::PROT_WRITE | syscall::MapFlags::MAP_PRIVATE,
-            address: 0,
-        }).unwrap() as *mut Tcb)
+    let page = {
+        &mut *(syscall::fmap(
+            !0,
+            &syscall::Map {
+                offset: 0,
+                size: syscall::PAGE_SIZE,
+                flags: syscall::MapFlags::PROT_READ
+                    | syscall::MapFlags::PROT_WRITE
+                    | syscall::MapFlags::MAP_PRIVATE,
+                address: 0,
+            },
+        )
+        .unwrap() as *mut Tcb)
     };
     page.tcb_ptr = page;
     page.tcb_len = syscall::PAGE_SIZE;
     page.tls_end = (page as *mut Tcb).cast();
+    // Make sure to use ptr::write to prevent dropping the existing FdGuard
+    core::ptr::write(page.os_specific.thr_fd.get(), None);
 
-    #[cfg(not(target_arch = "aarch64"))]
+    #[cfg(not(any(target_arch = "aarch64", target_arch = "riscv64")))]
     unsafe {
-        tcb_activate(page as *mut Tcb as usize, 0)
+        let tcb_addr = page as *mut Tcb as usize;
+        tcb_activate(&page.os_specific, tcb_addr, 0)
     }
     #[cfg(target_arch = "aarch64")]
     unsafe {
         let abi_ptr = core::ptr::addr_of_mut!(page.tcb_ptr);
         core::arch::asm!("msr tpidr_el0, {}", in(reg) abi_ptr);
     }
+    #[cfg(target_arch = "riscv64")]
+    unsafe {
+        let abi_ptr = core::ptr::addr_of_mut!(page.tcb_ptr) as usize;
+        core::arch::asm!("mv tp, {}", in(reg) (abi_ptr + 8));
+    }
+    initialize();
+}
+pub unsafe fn initialize() {
+    THIS_PID
+        .get()
+        .write(Some(syscall::getpid().unwrap().try_into().unwrap()).unwrap());
+}
+
+static THIS_PID: SyncUnsafeCell<u32> = SyncUnsafeCell::new(0);
+
+unsafe fn child_hook_common(new_pid_fd: FdGuard) {
+    // TODO: Currently pidfd == threadfd, but this will not be the case later.
+    RtTcb::current().thr_fd.get().write(Some(new_pid_fd));
+    THIS_PID
+        .get()
+        .write(Some(syscall::getpid().unwrap().try_into().unwrap()).unwrap());
 }

redox-rt/src/proc.rs

-use core::mem::size_of;
+use core::{fmt::Debug, mem::size_of};
+
 use crate::{arch::*, auxv_defs::*};
 
 use alloc::{boxed::Box, collections::BTreeMap, vec};
@@ -44,10 +45,14 @@ pub struct InterpOverride {
 
 pub struct ExtraInfo<'a> {
     pub cwd: Option<&'a [u8]>,
+    // Default scheme for the process
+    pub default_scheme: Option<&'a [u8]>,
     // POSIX states that while sigactions are reset, ignored sigactions will remain ignored.
     pub sigignmask: u64,
     // POSIX also states that the sigprocmask must be preserved across execs.
     pub sigprocmask: u64,
+    /// File mode creation mask (POSIX)
+    pub umask: u32,
 }
 
 pub fn fexec_impl<A, E>(
@@ -267,18 +272,23 @@ where
         let new_page_no = sp / PAGE_SIZE;
         let new_page_off = sp % PAGE_SIZE;
 
-        let page = if let Some(ref mut page) = stack_page && old_page_no == new_page_no {
+        let page = if let Some(ref mut page) = stack_page
+            && old_page_no == new_page_no
+        {
             page
         } else if let Some(ref mut stack_page) = stack_page {
             stack_page.remap(new_page_no * PAGE_SIZE, PROT_WRITE)?;
             stack_page
         } else {
-            let new = MmapGuard::map(*grants_fd, &Map {
-                offset: new_page_no * PAGE_SIZE,
-                size: PAGE_SIZE,
-                flags: PROT_WRITE,
-                address: 0, // let kernel decide
-            })?;
+            let new = MmapGuard::map(
+                *grants_fd,
+                &Map {
+                    offset: new_page_no * PAGE_SIZE,
+                    size: PAGE_SIZE,
+                    flags: PROT_WRITE,
+                    address: 0, // let kernel decide
+                },
+            )?;
 
             stack_page.insert(new)
         };
@@ -345,8 +355,9 @@ where
     )?;
     push(AT_PHENT)?;
 
-    let total_args_envs_auxvpointee_size =
-        total_args_envs_size + extrainfo.cwd.map_or(0, |s| s.len() + 1);
+    let total_args_envs_auxvpointee_size = total_args_envs_size
+        + extrainfo.cwd.map_or(0, |s| s.len() + 1)
+        + extrainfo.default_scheme.map_or(0, |s| s.len() + 1);
     let args_envs_size_aligned = total_args_envs_auxvpointee_size.next_multiple_of(PAGE_SIZE);
     let target_args_env_address =
         find_free_target_addr(&tree, args_envs_size_aligned).ok_or(Error::new(ENOMEM))?;
@@ -386,10 +397,18 @@ where
 
         if let Some(cwd) = extrainfo.cwd {
             push(append(cwd)?)?;
-            push(AT_REDOX_INITIALCWD_PTR)?;
+            push(AT_REDOX_INITIAL_CWD_PTR)?;
             push(cwd.len())?;
-            push(AT_REDOX_INITIALCWD_LEN)?;
+            push(AT_REDOX_INITIAL_CWD_LEN)?;
+        }
+
+        if let Some(default_scheme) = extrainfo.default_scheme {
+            push(append(default_scheme)?)?;
+            push(AT_REDOX_INITIAL_DEFAULT_SCHEME_PTR)?;
+            push(default_scheme.len())?;
+            push(AT_REDOX_INITIAL_DEFAULT_SCHEME_LEN)?;
         }
+
         #[cfg(target_pointer_width = "32")]
         {
             push((extrainfo.sigignmask >> 32) as usize)?;
@@ -405,6 +424,9 @@ where
         push(extrainfo.sigprocmask as usize)?;
         push(AT_REDOX_INHERITED_SIGPROCMASK)?;
 
+        push(extrainfo.umask as usize)?;
+        push(AT_REDOX_UMASK);
+
         push(0)?;
 
         for env in envs {
@@ -422,12 +444,15 @@ where
     push(argc)?;
 
     if let Ok(sighandler_fd) = syscall::dup(*open_via_dup, b"sighandler").map(FdGuard::new) {
-        let _ = syscall::write(*sighandler_fd, &SetSighandlerData {
-            user_handler: 0,
-            excp_handler: 0,
-            thread_control_addr: 0,
-            proc_control_addr: 0,
-        });
+        let _ = syscall::write(
+            *sighandler_fd,
+            &SetSighandlerData {
+                user_handler: 0,
+                excp_handler: 0,
+                thread_control_addr: 0,
+                proc_control_addr: 0,
+            },
+        );
     }
 
     unsafe {
@@ -689,6 +714,11 @@ impl Drop for FdGuard {
         }
     }
 }
+impl Debug for FdGuard {
+    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
+        write!(f, "[fd {}]", self.fd)
+    }
+}
 pub fn create_set_addr_space_buf(
     space: usize,
     ip: usize,
@@ -706,7 +736,7 @@ pub fn create_set_addr_space_buf(
 /// descriptors from other schemes are reobtained with `dup`, and grants referencing such file
 /// descriptors are reobtained through `fmap`. Other mappings are kept but duplicated using CoW.
 pub fn fork_impl() -> Result<usize> {
-    let mut old_mask = crate::signal::get_sigmask()?;
+    let old_mask = crate::signal::get_sigmask()?;
     let pid = unsafe { Error::demux(__relibc_internal_fork_wrapper())? };
 
     if pid == 0 {
@@ -719,8 +749,11 @@ pub fn fork_inner(initial_rsp: *mut usize) -> Result<usize> {
     let (cur_filetable_fd, new_pid_fd, new_pid);
 
     {
-        let cur_pid_fd = FdGuard::new(syscall::open("thisproc:current/open_via_dup", O_CLOEXEC)?);
-        (new_pid_fd, new_pid) = new_context()?;
+        let cur_pid_fd = FdGuard::new(syscall::open(
+            "/scheme/thisproc/current/open_via_dup",
+            O_CLOEXEC,
+        )?);
+        (new_pid_fd, new_pid) = new_child_process()?;
 
         copy_str(*cur_pid_fd, *new_pid_fd, "name")?;
 
@@ -818,9 +851,11 @@ pub fn fork_inner(initial_rsp: *mut usize) -> Result<usize> {
             // reference to the TCB and whatever pages stores the signal proc control struct.
             {
                 let new_sighandler_fd = FdGuard::new(syscall::dup(*new_pid_fd, b"sighandler")?);
-                let _ = syscall::write(*new_sighandler_fd, &crate::signal::current_setsighandler_struct())?;
+                let _ = syscall::write(
+                    *new_sighandler_fd,
+                    &crate::signal::current_setsighandler_struct(),
+                )?;
             }
-
         }
         copy_env_regs(*cur_pid_fd, *new_pid_fd)?;
     }
@@ -843,9 +878,12 @@ pub fn fork_inner(initial_rsp: *mut usize) -> Result<usize> {
     Ok(new_pid)
 }
 
-pub fn new_context() -> Result<(FdGuard, usize)> {
+pub fn new_child_process() -> Result<(FdGuard, usize)> {
     // Create a new context (fields such as uid/gid will be inherited from the current context).
-    let fd = FdGuard::new(syscall::open("thisproc:new/open_via_dup", O_CLOEXEC)?);
+    let fd = FdGuard::new(syscall::open(
+        "/scheme/thisproc/new/open_via_dup",
+        O_CLOEXEC,
+    )?);
 
     // Extract pid.
     let mut buffer = [0_u8; 64];

redox-rt/src/sync.rs

 // TODO: Share code for simple futex-based mutex between relibc's Mutex<()> and this.
 
-use core::cell::UnsafeCell;
-use core::ops::{Deref, DerefMut};
-use core::sync::atomic::{AtomicU32, Ordering};
+use core::{
+    cell::UnsafeCell,
+    ops::{Deref, DerefMut},
+    sync::atomic::{AtomicU32, Ordering},
+};
 
 pub struct Mutex<T> {
     pub lockword: AtomicU32,
@@ -24,7 +26,11 @@ impl<T> Mutex<T> {
         }
     }
     pub fn lock(&self) -> MutexGuard<'_, T> {
-        while self.lockword.compare_exchange(UNLOCKED, LOCKED, Ordering::Acquire, Ordering::Relaxed).is_err() {
+        while self
+            .lockword
+            .compare_exchange(UNLOCKED, LOCKED, Ordering::Acquire, Ordering::Relaxed)
+            .is_err()
+        {
             core::hint::spin_loop();
         }
         MutexGuard { lock: self }