Merge branch 'update-toolchain-2022' into 'master'

Update toolchain, removing dependence on nightly features

See merge request !68

Cargo.toml

 [package]
 name = "redox_syscall"
-version = "0.2.11"
+version = "0.2.12"
 description = "A Rust library to access raw Redox system calls"
 license = "MIT"
 authors = ["Jeremy Soller <jackpot51@gmail.com>"]

src/arch/aarch64.rs

@@ -9,7 +9,7 @@ macro_rules! syscall {
             pub unsafe fn $name($a: usize, $($b: usize, $($c: usize, $($d: usize, $($e: usize, $($f: usize)?)?)?)?)?) -> Result<usize> {
                 let ret: usize;
 
-                asm!(
+                core::arch::asm!(
                     "svc 0",
                     in("x8") $a,
                     $(

src/arch/x86_64.rs

 use core::{mem, slice};
+use core::arch::asm;
 use core::ops::{Deref, DerefMut};
 
 use super::error::{Error, Result};

src/daemon.rs

+use core::convert::Infallible;
+
 use super::{
     clone,
     CloneFlags,
@@ -17,7 +19,7 @@ pub struct Daemon {
 }
 
 impl Daemon {
-    pub fn new<F: FnOnce(Daemon) -> !>(f: F) -> Result<!> {
+    pub fn new<F: FnOnce(Daemon) -> Infallible>(f: F) -> Result<Infallible> {
         let mut pipes = [0; 2];
         pipe2(&mut pipes, 0)?;
 
@@ -29,6 +31,8 @@ impl Daemon {
             f(Daemon {
                 write_pipe,
             });
+            // TODO: Replace Infallible with the never type once it is stabilized.
+            unreachable!();
         } else {
             let _ = close(write_pipe);
 

src/io/mmio.rs

-use core::ptr::{read_volatile, write_volatile};
+use core::ptr::{read_volatile, write_volatile, addr_of, addr_of_mut};
 use core::mem::MaybeUninit;
 use core::ops::{BitAnd, BitOr, Not};
 
@@ -36,10 +36,10 @@ impl<T> Io for Mmio<T> where T: Copy + PartialEq + BitAnd<Output = T> + BitOr<Ou
     type Value = T;
 
     fn read(&self) -> T {
-        unsafe { read_volatile(self.value.as_ptr()) }
+        unsafe { read_volatile(addr_of!(self.value).cast::<T>()) }
     }
 
     fn write(&mut self, value: T) {
-        unsafe { write_volatile(self.value.as_mut_ptr(), value) };
+        unsafe { write_volatile(addr_of_mut!(self.value).cast::<T>(), value) };
     }
 }

src/io/mod.rs

@@ -3,9 +3,13 @@
 pub use self::dma::*;
 pub use self::io::*;
 pub use self::mmio::*;
+
+#[cfg(target_arch = "x86_64")]
 pub use self::pio::*;
 
 mod dma;
 mod io;
 mod mmio;
+
+#[cfg(target_arch = "x86_64")]
 mod pio;

src/io/pio.rs

+use core::arch::asm;
 use core::marker::PhantomData;
 
 use super::io::Io;
@@ -13,7 +14,7 @@ impl<T> Pio<T> {
     /// Create a PIO from a given port
     pub const fn new(port: u16) -> Self {
         Pio::<T> {
-            port: port,
+            port,
             value: PhantomData,
         }
     }
@@ -28,7 +29,7 @@ impl Io for Pio<u8> {
     fn read(&self) -> u8 {
         let value: u8;
         unsafe {
-            llvm_asm!("in $0, $1" : "={al}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("in al, dx", in("dx") self.port, out("al") value, options(nostack, nomem, preserves_flags));
         }
         value
     }
@@ -37,7 +38,7 @@ impl Io for Pio<u8> {
     #[inline(always)]
     fn write(&mut self, value: u8) {
         unsafe {
-            llvm_asm!("out $1, $0" : : "{al}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("out dx, al", in("dx") self.port, in("al") value, options(nostack, nomem, preserves_flags));
         }
     }
 }
@@ -51,7 +52,7 @@ impl Io for Pio<u16> {
     fn read(&self) -> u16 {
         let value: u16;
         unsafe {
-            llvm_asm!("in $0, $1" : "={ax}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("in ax, dx", in("dx") self.port, out("ax") value, options(nostack, nomem, preserves_flags));
         }
         value
     }
@@ -60,7 +61,7 @@ impl Io for Pio<u16> {
     #[inline(always)]
     fn write(&mut self, value: u16) {
         unsafe {
-            llvm_asm!("out $1, $0" : : "{ax}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("out dx, ax", in("dx") self.port, in("ax") value, options(nostack, nomem, preserves_flags));
         }
     }
 }
@@ -74,7 +75,7 @@ impl Io for Pio<u32> {
     fn read(&self) -> u32 {
         let value: u32;
         unsafe {
-            llvm_asm!("in $0, $1" : "={eax}"(value) : "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("in eax, dx", in("dx") self.port, out("eax") value, options(nostack, nomem, preserves_flags));
         }
         value
     }
@@ -83,7 +84,7 @@ impl Io for Pio<u32> {
     #[inline(always)]
     fn write(&mut self, value: u32) {
         unsafe {
-            llvm_asm!("out $1, $0" : : "{eax}"(value), "{dx}"(self.port) : "memory" : "intel", "volatile");
+            asm!("out dx, eax", in("dx") self.port, in("eax") value, options(nostack, nomem, preserves_flags));
         }
     }
 }

src/lib.rs

-#![feature(asm)]
-#![feature(llvm_asm)]
-#![feature(never_type)]
 #![cfg_attr(not(test), no_std)]
 
 #[cfg(test)]