WIP: Separate IDT for each processor
Separates the IDTs in memory that the CPUs use, so that every processor can use their own unique vectors. One consequence of this is that all CPUs other than the BSP will have IRQs 0-15 (well, vectors 32-47) allocatable. On a 4-thread CPU, this means that there will be 854 available vectors for drivers.
If interrupt handlers through unix signals are implemented, this makes it very convenient for some drivers to allocate one vector per logical CPU, reference these vectors in an MSI-X table, and tie the signal to the CPU that the interrupt uses. This way, we could mimic the behavior on monolithic kernels, and have good performance (apart from the context switch).
Marked as WIP because this makes xhcid
non-functioning, and because it hasn't been rebased against spurious-irqs
either.