Skip to content
Snippets Groups Projects
Verified Commit e860a19e authored by Jacob Lorentzon's avatar Jacob Lorentzon
Browse files

WIP: Update i686 signal asm.

parent 09108634
No related branches found
No related tags found
1 merge request!493Implement realtime signals and remaining signal.h APIs
...@@ -22,7 +22,9 @@ pub struct SigArea { ...@@ -22,7 +22,9 @@ pub struct SigArea {
pub tmp_eax: usize, pub tmp_eax: usize,
pub tmp_ecx: usize, pub tmp_ecx: usize,
pub tmp_edx: usize, pub tmp_edx: usize,
pub tmp_inf: RtSigInfo, pub tmp_rt_inf: RtSigInfo,
pub tmp_id_inf: u64,
pub tmp_mm0: u64,
pub pctl: usize, // TODO: reference pctl directly pub pctl: usize, // TODO: reference pctl directly
pub disable_signals_depth: u64, pub disable_signals_depth: u64,
pub last_sig_was_restart: bool, pub last_sig_was_restart: bool,
...@@ -151,6 +153,12 @@ asmfunction!(__relibc_internal_sigentry: [" ...@@ -151,6 +153,12 @@ asmfunction!(__relibc_internal_sigentry: ["
jz 3f jz 3f
bsf eax, eax bsf eax, eax
// Read si_pid and si_uid, atomically.
movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
movq mm0, [ecx + {pctl_sender_infos} + eax * 8]
movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
// Try clearing the pending bit, otherwise retry if another thread did that first // Try clearing the pending bit, otherwise retry if another thread did that first
lock btr [ecx + {pctl_word}], eax lock btr [ecx + {pctl_word}], eax
jnc 1b jnc 1b
...@@ -172,7 +180,7 @@ asmfunction!(__relibc_internal_sigentry: [" ...@@ -172,7 +180,7 @@ asmfunction!(__relibc_internal_sigentry: ["
lea ecx, [eax+32] lea ecx, [eax+32]
mov eax, {SYS_SIGDEQUEUE} mov eax, {SYS_SIGDEQUEUE}
mov edx, gs:[0] mov edx, gs:[0]
add edx, {tcb_sa_off} + {sa_tmp_inf} add edx, {tcb_sa_off} + {sa_tmp_rt_inf}
int 0x80 int 0x80
mov ebx, edx mov ebx, edx
test eax, eax test eax, eax
...@@ -183,13 +191,24 @@ asmfunction!(__relibc_internal_sigentry: [" ...@@ -183,13 +191,24 @@ asmfunction!(__relibc_internal_sigentry: ["
8: 8:
add eax, 32 add eax, 32
9: 9:
// Read si_pid and si_uid, atomically.
movq gs:[{tcb_sa_off} + {sa_tmp_mm0}], mm0
movq mm0, gs:[{tcb_sc_off} + {sc_sender_infos} + eax * 8]
movq gs:[{tcb_sa_off} + {sa_tmp_id_inf}], mm0
movq mm0, gs:[{tcb_sa_off} + {sa_tmp_mm0}]
mov edx, eax
shr edx, 5
mov ecx, eax
and ecx, 31
lock btr gs:[{tcb_sc_off} + {sc_word} + edx * 8], ecx
add eax, 64 add eax, 64
2: 2:
and esp, -{STACK_ALIGN} and esp, -{STACK_ALIGN}
mov edx, eax mov edx, eax
add edx, edx add edx, edx
bt dword ptr [{pctl} + {pctl_off_actions} + edx * 8 + 4], 28 bt dword ptr [{pctl} + {pctl_actions} + edx * 8 + 4], 28
jnc 4f jnc 4f
mov edx, gs:[{tcb_sa_off} + {sa_altstack_top}] mov edx, gs:[{tcb_sa_off} + {sa_altstack_top}]
...@@ -269,7 +288,9 @@ __relibc_internal_sigentry_crit_third: ...@@ -269,7 +288,9 @@ __relibc_internal_sigentry_crit_third:
sa_tmp_eax = const offset_of!(SigArea, tmp_eax), sa_tmp_eax = const offset_of!(SigArea, tmp_eax),
sa_tmp_ecx = const offset_of!(SigArea, tmp_ecx), sa_tmp_ecx = const offset_of!(SigArea, tmp_ecx),
sa_tmp_edx = const offset_of!(SigArea, tmp_edx), sa_tmp_edx = const offset_of!(SigArea, tmp_edx),
sa_tmp_inf = const offset_of!(SigArea, tmp_inf), sa_tmp_mm0 = const offset_of!(SigArea, tmp_mm0),
sa_tmp_rt_inf = const offset_of!(SigArea, tmp_rt_inf),
sa_tmp_id_inf = const offset_of!(SigArea, tmp_id_inf),
sa_altstack_top = const offset_of!(SigArea, altstack_top), sa_altstack_top = const offset_of!(SigArea, altstack_top),
sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom), sa_altstack_bottom = const offset_of!(SigArea, altstack_bottom),
sa_pctl = const offset_of!(SigArea, pctl), sa_pctl = const offset_of!(SigArea, pctl),
...@@ -277,9 +298,11 @@ __relibc_internal_sigentry_crit_third: ...@@ -277,9 +298,11 @@ __relibc_internal_sigentry_crit_third:
sc_saved_eflags = const offset_of!(Sigcontrol, saved_archdep_reg), sc_saved_eflags = const offset_of!(Sigcontrol, saved_archdep_reg),
sc_saved_eip = const offset_of!(Sigcontrol, saved_ip), sc_saved_eip = const offset_of!(Sigcontrol, saved_ip),
sc_word = const offset_of!(Sigcontrol, word), sc_word = const offset_of!(Sigcontrol, word),
sc_sender_infos = const offset_of!(Sigcontrol, sender_infos),
tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch), tcb_sa_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, arch),
tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control), tcb_sc_off = const offset_of!(crate::Tcb, os_specific) + offset_of!(RtSigarea, control),
pctl_off_actions = const offset_of!(SigProcControl, actions), pctl_actions = const offset_of!(SigProcControl, actions),
pctl_sender_infos = const offset_of!(SigProcControl, sender_infos),
pctl_word = const offset_of!(SigProcControl, pending), pctl_word = const offset_of!(SigProcControl, pending),
pctl = sym PROC_CONTROL_STRUCT, pctl = sym PROC_CONTROL_STRUCT,
STACK_ALIGN = const 16, STACK_ALIGN = const 16,
......
...@@ -59,8 +59,9 @@ const _: () = { ...@@ -59,8 +59,9 @@ const _: () = {
} }
}; };
// TODO: It's just a guess based on Linux // should include both SigStack size, and some extra room for the libc handler
pub const MINSIGSTKSZ: usize = 2048; pub const MINSIGSTKSZ: usize = 2048;
pub const SIGSTKSZ: usize = 8096; pub const SIGSTKSZ: usize = 8096;
pub const SI_QUEUE: i32 = -1; pub const SI_QUEUE: i32 = -1;
...@@ -90,7 +91,7 @@ pub struct ucontext { ...@@ -90,7 +91,7 @@ pub struct ucontext {
pub struct mcontext { pub struct mcontext {
#[cfg(target_arch = "x86")] #[cfg(target_arch = "x86")]
_opaque: [u8; 512], _opaque: [u8; 512],
#[cfg(target_arch = "x86-64")] #[cfg(target_arch = "x86_64")]
_opaque: [u8; 864], _opaque: [u8; 864],
#[cfg(target_arch = "aarch64")] #[cfg(target_arch = "aarch64")]
_opaque: [u8; 272], _opaque: [u8; 272],
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment